From: Sean Anderson <sean.anderson@linux.dev>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Vinod Koul <vkoul@kernel.org>,
linux-phy@lists.infradead.org
Cc: "Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Radhey Shyam Pandey" <radhey.shyam.pandey@amd.com>,
linux-kernel@vger.kernel.org,
"Michal Simek" <michal.simek@amd.com>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Thippeswamy Havalige" <thippeswamy.havalige@amd.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Sean Anderson" <sean.anderson@linux.dev>
Subject: [PATCH 3/8] phy: zynqmp: Refactor common phy initialization into a helper
Date: Mon, 2 Feb 2026 19:21:23 -0500 [thread overview]
Message-ID: <20260203002128.935842-4-sean.anderson@linux.dev> (raw)
In-Reply-To: <20260203002128.935842-1-sean.anderson@linux.dev>
All lanes undergoing ILL calibration must be initialized. Split off
common phy initialization into a helper so that we can ensure all lanes
are initialized before performing calibration.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
drivers/phy/xilinx/phy-zynqmp.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c
index 0d3c578d0f3f..152af1702bbd 100644
--- a/drivers/phy/xilinx/phy-zynqmp.c
+++ b/drivers/phy/xilinx/phy-zynqmp.c
@@ -520,6 +520,21 @@ static void xpsgtr_bypass_scrambler_8b10b(struct xpsgtr_phy *gtr_phy)
xpsgtr_write_phy(gtr_phy, L0_TX_DIG_61, L0_TM_DISABLE_SCRAMBLE_ENCODER);
}
+static int xpsgtr_common_init(struct xpsgtr_phy *gtr_phy)
+{
+ int ret;
+
+ /* Enable coarse code saturation limiting logic. */
+ xpsgtr_write_phy(gtr_phy, L0_TM_PLL_DIG_37, L0_TM_COARSE_CODE_LIMIT);
+
+ ret = xpsgtr_configure_pll(gtr_phy);
+ if (ret)
+ return ret;
+
+ xpsgtr_lane_set_protocol(gtr_phy);
+ return 0;
+}
+
/* DP-specific initialization. */
static void xpsgtr_phy_init_dp(struct xpsgtr_phy *gtr_phy)
{
@@ -682,19 +697,14 @@ static int xpsgtr_phy_init(struct phy *phy)
gtr_dev->tx_term_fix = false;
}
- /* Enable coarse code saturation limiting logic. */
- xpsgtr_write_phy(gtr_phy, L0_TM_PLL_DIG_37, L0_TM_COARSE_CODE_LIMIT);
-
/*
* Configure the PLL, the lane protocol, and perform protocol-specific
* initialization.
*/
- ret = xpsgtr_configure_pll(gtr_phy);
+ ret = xpsgtr_common_init(gtr_phy);
if (ret)
goto out;
- xpsgtr_lane_set_protocol(gtr_phy);
-
switch (gtr_phy->protocol) {
case ICM_PROTOCOL_DP:
xpsgtr_phy_init_dp(gtr_phy);
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2026-02-03 0:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-03 0:21 [PATCH 0/8] phy: zynqmp: Perform complete initialization, including ILL calibration Sean Anderson
2026-02-03 0:21 ` [PATCH 1/8] dt-bindings: pci: xilinx-nwl: Add resets Sean Anderson
2026-02-04 8:32 ` Pandey, Radhey Shyam
2026-02-05 15:47 ` Sean Anderson
2026-02-18 16:36 ` Manivannan Sadhasivam
2026-02-10 0:24 ` Rob Herring (Arm)
2026-02-03 0:21 ` [PATCH 2/8] phy: zynqmp: Refactor bus width configuration into helper Sean Anderson
2026-02-10 15:00 ` Pandey, Radhey Shyam
2026-02-03 0:21 ` Sean Anderson [this message]
2026-02-10 15:05 ` [PATCH 3/8] phy: zynqmp: Refactor common phy initialization into a helper Pandey, Radhey Shyam
2026-02-03 0:21 ` [PATCH 4/8] phy: zynqmp: Calibrate ILL if necessary Sean Anderson
2026-02-10 16:04 ` Pandey, Radhey Shyam
2026-02-10 16:42 ` Sean Anderson
2026-02-03 0:21 ` [PATCH 5/8] phy: zynqmp: Initialize chicken bits Sean Anderson
2026-02-03 0:21 ` [PATCH 6/8] PCI: xilinx-nwl: Split phy_init from phy_power_on Sean Anderson
2026-02-03 0:21 ` [PATCH 7/8] PCI: xilinx-nwl: Reset the core during probe Sean Anderson
2026-02-18 16:42 ` Manivannan Sadhasivam
2026-02-03 0:21 ` [PATCH 8/8] arm64: zynqmp: Add PCIe resets Sean Anderson
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