From: Akhila YS <akhilayalmati@gmail.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Akhila YS <akhilayalmati@gmail.com>
Subject: [PATCH 5/5] dt-bindings: arm: atmel,at91rm9200-sdramc: convert to DT schema
Date: Tue, 17 Feb 2026 17:24:23 +0000 [thread overview]
Message-ID: <20260217-arm-microchip-v1-5-ae5d907e10e3@gmail.com> (raw)
In-Reply-To: <20260217-arm-microchip-v1-0-ae5d907e10e3@gmail.com>
Convert RAMC SDRAM/DDR controller binding to YAML format.
Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
---
.../bindings/arm/atmel,at91rm9200-sdramc.yaml | 67 ++++++++++++++++++++++
.../devicetree/bindings/arm/atmel-sysregs.txt | 48 ----------------
2 files changed, 67 insertions(+), 48 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
new file mode 100644
index 000000000000..76cd8f73331c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel,at91rm9200-sdramc.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/atmel,at91rm9200-sdramc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip (Atmel) SDRAM / DDR Controller (RAMC / DDRAMC / UDDRC)
+
+maintainers:
+ - Nicolas Ferre <nicolas.ferre@microchip.com>
+ - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+description:
+ The SDRAM/DDR Controller (often called RAMC or DDRAMC) in various
+ Atmel/Microchip ARM9 and Cortex-A5/A7 SoCs manages external
+ SDRAM / DDR memory. It is typically exposed as a syscon node for
+ register access from other drivers (e.g. for initialization or mode
+ configuration). No interrupts or clocks are usually required in the
+ binding.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: atmel,at91rm9200-sdramc
+ - const: syscon
+ - items:
+ - const: microchip,sama7d65-uddrc
+ - const: microchip,sama7g5-uddrc
+ - items:
+ enum:
+ - atmel,at91sam9260-sdramc
+ - atmel,at91sam9g45-ddramc
+ - atmel,sama5d3-ddramc
+ - microchip,sam9x60-ddramc
+ - microchip,sam9x7-ddramc
+ - microchip,sama7g5-uddrc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: ddrck
+ - const: mpddr
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/at91.h>
+ ramc@ffffe400 {
+ compatible = "atmel,at91sam9g45-ddramc";
+ reg = <0xffffe400 0x200>;
+ clocks = <&pmc PMC_TYPE_SYSTEM 2>;
+ clock-names = "ddrck";
+ };
+...
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
deleted file mode 100644
index 5ce54f9befe6..000000000000
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-Atmel system registers
-
-Chipid required properties:
-- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
- "microchip,sama7d65-chipid"
-- reg : Should contain registers location and length
-
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
- shared across all System Controller members.
-
-PIT64B Timer required properties:
-- compatible: Should be "microchip,sam9x60-pit64b" or
- "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
- "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for PIT64B timer
-- clocks: Should contain the available clock sources for PIT64B timer.
-
-System Timer (ST) required properties:
-- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the ST which is the IRQ line
- shared across all System Controller members.
-- clocks: phandle to input clock.
-Its subnodes can be:
-- watchdog: compatible should be "atmel,at91rm9200-wdt"
-
-RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" or
- "atmel,at91sam9260-sdramc" or
- "atmel,at91sam9g45-ddramc" or
- "atmel,sama5d3-ddramc" or
- "microchip,sam9x60-ddramc" or
- "microchip,sama7g5-uddrc" or
- "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc" or
- "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
-- reg: Should contain registers location and length
-
-Examples:
-
- ramc0: ramc@ffffe800 {
- compatible = "atmel,at91sam9g45-ddramc";
- reg = <0xffffe800 0x200>;
- };
-
--
2.43.0
next prev parent reply other threads:[~2026-02-17 17:25 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-17 17:24 [PATCH 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML Akhila YS
2026-02-17 17:24 ` [PATCH 1/5] dt-bindings: arm: microchip,sama7g5-chipid : convert to DT schema Akhila YS
2026-02-17 17:51 ` Conor Dooley
2026-02-24 14:43 ` Akhila YS
2026-02-17 17:24 ` [PATCH 2/5] dt-bindings: arm: atmel,at91sam9260-pit: " Akhila YS
2026-02-17 17:24 ` [PATCH 3/5] dt-bindings: arm: microchip,sam9x60-pit64b : " Akhila YS
2026-02-17 17:53 ` Conor Dooley
2026-02-24 14:44 ` Akhila YS
2026-02-17 17:24 ` [PATCH 4/5] dt-bindings: arm: atmel,at91rm9200-st: " Akhila YS
2026-02-17 17:24 ` Akhila YS [this message]
2026-02-17 17:51 ` [PATCH 0/5] dt-bindings: Microchip/Atmel AT91/SAMA system peripherals: convert to YAML Conor Dooley
2026-02-24 14:42 ` Akhila YS
2026-02-24 14:56 ` Conor Dooley
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