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From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: "Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Will Deacon" <will@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com,
	bjorn.andersson@oss.qualcomm.com,
	Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Subject: [PATCH v2 2/5] PCI: dwc: Use common D3cold eligibility helper in suspend path
Date: Tue, 17 Feb 2026 16:49:07 +0530	[thread overview]
Message-ID: <20260217-d3cold-v2-2-89b322864043@oss.qualcomm.com> (raw)
In-Reply-To: <20260217-d3cold-v2-0-89b322864043@oss.qualcomm.com>

Previously, the driver skipped putting the link into L2/device state in
D3cold whenever L1 ASPM was enabled, since some devices (e.g. NVMe) expect
low resume latency and may not tolerate deeper power states. However, such
devices typically remain in D0 and are already covered by the new helper's
requirement that all endpoints be in D3hot before the host bridge may
enter D3cold.

So, replace the local L1/L1SS-based check in dw_pcie_suspend_noirq() with
the shared pci_host_common_can_enter_d3cold() helper to decide whether the
DesignWare host bridge can safely transition to D3cold.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
 drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 6ae6189e9b8a9021c99ece17504834650debd86b..713aa64553bfc988717cab2936935bb43aabd72c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -16,9 +16,11 @@
 #include <linux/msi.h>
 #include <linux/of_address.h>
 #include <linux/of_pci.h>
+#include <linux/pci.h>
 #include <linux/pci_regs.h>
 #include <linux/platform_device.h>
 
+#include "../pci-host-common.h"
 #include "../../pci.h"
 #include "pcie-designware.h"
 
@@ -1218,18 +1220,13 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
 
 int dw_pcie_suspend_noirq(struct dw_pcie *pci)
 {
-	u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
 	int ret = 0;
 	u32 val;
 
 	if (!dw_pcie_link_up(pci))
 		goto stop_link;
 
-	/*
-	 * If L1SS is supported, then do not put the link into L2 as some
-	 * devices such as NVMe expect low resume latency.
-	 */
-	if (dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKCTL) & PCI_EXP_LNKCTL_ASPM_L1)
+	if (!pci_host_common_can_enter_d3cold(pci->pp.bridge))
 		return 0;
 
 	if (pci->pp.ops->pme_turn_off) {

-- 
2.34.1



  parent reply	other threads:[~2026-02-17 11:19 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17 11:19 [PATCH v2 0/5] PCI: qcom: Add D3cold support Krishna Chaitanya Chundru
2026-02-17 11:19 ` [PATCH v2 1/5] PCI: host-common: Add helper to determine host bridge D3cold eligibility Krishna Chaitanya Chundru
2026-02-23 18:10   ` Bjorn Helgaas
2026-02-23 18:46     ` Rafael J. Wysocki
2026-02-23 19:55       ` Bjorn Helgaas
2026-02-23 20:03         ` Rafael J. Wysocki
2026-03-05  7:42   ` Manivannan Sadhasivam
2026-02-17 11:19 ` Krishna Chaitanya Chundru [this message]
2026-02-17 11:19 ` [PATCH v2 3/5] PCI: qcom: Add .get_ltssm() helper Krishna Chaitanya Chundru
2026-03-05  7:46   ` Manivannan Sadhasivam
2026-02-17 11:19 ` [PATCH v2 4/5] PCI: qcom: Power down PHY via PARF_PHY_CTRL before disabling rails/clocks Krishna Chaitanya Chundru
2026-03-05  7:49   ` Manivannan Sadhasivam
2026-03-05  8:56     ` Krishna Chaitanya Chundru
2026-03-05  9:18       ` Manivannan Sadhasivam
2026-03-06 10:31         ` Krishna Chaitanya Chundru
2026-02-17 11:19 ` [PATCH v2 5/5] PCI: qcom: Add D3cold support Krishna Chaitanya Chundru
2026-03-05  7:58   ` Manivannan Sadhasivam
2026-03-05  9:00     ` Krishna Chaitanya Chundru
2026-03-05  9:14       ` Manivannan Sadhasivam
2026-03-05  9:25         ` Krishna Chaitanya Chundru
2026-03-05  9:34           ` Manivannan Sadhasivam
2026-02-17 15:40 ` [PATCH v2 0/5] " Neil Armstrong

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