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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Feb 19, 2026 at 05:45:46PM +0530, Sai Sree Kartheek Adivi wrote: > > On 19/02/26 13:13, Krzysztof Kozlowski wrote: > > Hi Krzysztof, > > Thanks for the review. > > On Wed, Feb 18, 2026 at 03:22:37PM +0530, Sai Sree Kartheek Adivi wrote: > > > New binding document for > > Fix wrapping - it's wrapped too early. > Ack. will fix it in v6. > > > > > Texas Instruments K3 Block Copy DMA (BCDMA) V2. > > > > > > BCDMA V2 is introduced as part of AM62L. > > > > > > Signed-off-by: Sai Sree Kartheek Adivi > > > --- > > > .../bindings/dma/ti/ti,am62l-dmss-bcdma.yaml | 120 ++++++++++++++++++ > > > 1 file changed, 120 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-bcdma.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-bcdma.yaml > > > new file mode 100644 > > > index 0000000000000..6fa08f22df375 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/dma/ti/ti,am62l-dmss-bcdma.yaml > > > @@ -0,0 +1,120 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +# Copyright (C) 2024-25 Texas Instruments Incorporated > > > +# Author: Sai Sree Kartheek Adivi > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/dma/ti/ti,am62l-dmss-bcdma.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Texas Instruments K3 DMSS BCDMA V2 > > > + > > > +maintainers: > > > + - Sai Sree Kartheek Adivi > > > + > > > +description: > > > + The BCDMA V2 is intended to perform similar functions as the TR > > > + mode channels of K3 UDMA-P. > > > + BCDMA V2 includes block copy channels and Split channels. > > > + > > > + Block copy channels mainly used for memory to memory transfers, but with > > > + optional triggers a block copy channel can service peripherals by accessing > > > + directly to memory mapped registers or area. > > > + > > > + Split channels can be used to service PSI-L based peripherals. > > > + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals > > > + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the > > > + legacy peripheral. > > > + > > > +allOf: > > > + - $ref: /schemas/dma/dma-controller.yaml# > > > + > > > +properties: > > > + compatible: > > > + const: ti,am62l-dmss-bcdma > > > + > > > + reg: > > > + items: > > > + - description: BCDMA Control & Status Registers region > > > + - description: Block Copy Channel Realtime Registers region > > > + - description: Channel Realtime Registers region > > > + - description: Ring Realtime Registers region > > > + > > > + reg-names: > > > + items: > > > + - const: gcfg > > > + - const: bchanrt > > > + - const: chanrt > > > + - const: ringrt > > > + > > > + "#address-cells": > > > + const: 0 > > > + > > > + "#interrupt-cells": > > > + const: 1 > > I don't get why this is nexus but not a interrupt-controller. > > > > Can you point me to DTS with complete picture using this? > > Please refer https://github.com/sskartheekadivi/linux/commit/4a7078a6892bfbc4c620b9668e3421b4c7405ca4 > > for the dt nodes of AM62L BCDMA and PKTDMA. > > Refer to the below tree for full set of driver, dt-binding and dts changes > > https://github.com/sskartheekadivi/linux/commits/dma-upstream-v5/ Whether this is an interrupt-map or a chained interrupt controller entirely depends on whether the interrupts are transparent to the DMA controller (i.e. do they have to be acked?). interrupt-map is generally for transparent cases. If not transparent, then just 'interrupts' and 'interrupt-controller' should work for you. You can map 'interrupts' entries to channels like many other DMA controllers do that have per channel interrupts. Rob