From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0632EFD214 for ; Wed, 25 Feb 2026 09:25:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=q/YFuJsq9cUoXg0nWCd+cbLNRSqV7PV/bFihaLL87l0=; b=QR8KdLr3DacUXrGfpkIZCxaMxh AYhvE5ethlWfR7v+l3BX3brHufIZ4mXYSsBLxBFkFZH+aHGzGuNZUUcuH+02OpdsiJloN6AytuheP LYFQ9tLG/xzuD0RM9/znvJeEUqAM7/30Jd5RyOITjFUraUPK3VkPNNu6S1Q+w6xyvUSdBXKXQCd4b CF/ZHPVgbiRFZPRo9TXzkv8ggYSrD8uVDRGp19gHshLvemEohLtyaCdOlmTL7ITsUA2TdDYwjbCaM 7+326NOdpZszRPuye0G18J2zCrNZiujehNqq47M2HFhq9QZ30awH0+KtW7EyuEfaiYE9ApFEyXO9C q8uUTVOw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vvB8g-00000003g3g-3CZf; Wed, 25 Feb 2026 09:25:02 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vvB8c-00000003g0P-2GlQ for linux-arm-kernel@lists.infradead.org; Wed, 25 Feb 2026 09:24:59 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 25 Feb 2026 17:19:41 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 25 Feb 2026 17:19:41 +0800 From: Ryan Chen Date: Wed, 25 Feb 2026 17:19:38 +0800 Subject: [PATCH v25 1/4] dt-bindings: i2c: Split AST2600 binding into a new YAML MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260225-upstream_i2c-v25-1-9f4bdd954f3f@aspeedtech.com> References: <20260225-upstream_i2c-v25-0-9f4bdd954f3f@aspeedtech.com> In-Reply-To: <20260225-upstream_i2c-v25-0-9f4bdd954f3f@aspeedtech.com> To: , , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , "Benjamin Herrenschmidt" , Rayn Chen , Philipp Zabel CC: , , , , , , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772011180; l=3535; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=p3XViIblhW8oJFj6n1Zsl2Rw5WTqZm8nLB8Wh7OmMo4=; b=yyABtNoyBgfq/HsTN7vuppf+LNLpgedEgEYnXwHJK6eePm47Cj81kCQTATl+KqMsokwQu7jj8 MVAoLhx9BMHBkQ9wcPXnxfrqv0Brepquj6mz57dqq8DLD0Xxfe37L86 X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260225_012458_575377_EF844B83 X-CRM114-Status: GOOD ( 15.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The AST2600 I2C controller introduces a completely new register layout with separate controller and target register blocks, unlike the mixed register layout used by AST2400/AST2500. To describe this properly, split out the AST2600 I2C binding into its own YAML file. The compatible string remains unchanged. The example section is updated to reflect the actual AST2600 SoC register layout and interrupt configuration (aspeed-g6.dtsi, lines 885-897): - I2C bus and buffer register offsets - AST2600 I2C controller register base starts at 0x80, and the buffer region is located at 0xc00, per the AST2600 SoC register map. - Interrupt configuration - AST2600 I2C controllers are connected to the ARM GIC, not the legacy internal interrupt controller. Signed-off-by: Ryan Chen --- .../bindings/i2c/aspeed,ast2600-i2c.yaml | 62 ++++++++++++++++++++++ .../devicetree/bindings/i2c/aspeed,i2c.yaml | 3 +- 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml new file mode 100644 index 000000000000..077be85137c9 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/aspeed,ast2600-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED I2C on the AST26XX SoCs + +maintainers: + - Ryan Chen + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2600-i2c-bus + + reg: + items: + - description: controller registers + - description: controller buffer space + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: Desired operating frequency of the I2C bus in Hz. + minimum: 500 + maximum: 4000000 + default: 100000 + + resets: + maxItems: 1 + +required: + - reg + - compatible + - clocks + - resets + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + i2c@80 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "aspeed,ast2600-i2c-bus"; + reg = <0x80 0x80>, <0xc00 0x20>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_I2C>; + clock-frequency = <100000>; + interrupts = ; + }; diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml index 5b9bd2feda3b..d4e4f412feba 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs +title: ASPEED I2C on the AST24XX, AST25XX SoCs maintainers: - Rayn Chen @@ -17,7 +17,6 @@ properties: enum: - aspeed,ast2400-i2c-bus - aspeed,ast2500-i2c-bus - - aspeed,ast2600-i2c-bus reg: minItems: 1 -- 2.34.1