From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FBD3FD3774 for ; Wed, 25 Feb 2026 17:04:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=UFyVqV3uqJojdieFXZy0kqknIDR6el4/YUUSm+r5CIQ=; b=g4f9H53o7kIM+jqV+fPWV/yi1s HFfbhljrgMtug++Hu7Q6U5Yvr41GHIflOhBDnB6IxgiO6MRSlDirVbia6OgE3uaactF93Oc4mdCot kMeUTXzZg1i18h9R4ogCoFUDLcNfF3+vqzVu6itAN95Oiuv7tUWNOA9tpGGTflfSE1xFA7E8YowPc 26p7+YMsJ5NNP6SlJRVUALTJIJPbQDgXMkgKsM9ePOTQ4OF04LQ7tAR8PufCi4KXIHlBDbYPfS5/z BzXusS6431WNBLSVgDBpjZeAAB7mNippo45gLWztBFajd9FvrIYyIuLtcLaEZpz178GuspWPu/5w9 ZfPOE/1g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vvIJC-00000004bTg-0v4C; Wed, 25 Feb 2026 17:04:22 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vvIJ6-00000004bNw-0KMA for linux-arm-kernel@lists.infradead.org; Wed, 25 Feb 2026 17:04:17 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 5805B432B3; Wed, 25 Feb 2026 17:04:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A7D16C2BCB1; Wed, 25 Feb 2026 17:04:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772039055; bh=t51Jkp6wyJSs+rLYTTbGJ3ga5qDKsCyESdF4gKHClfs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ceNyWiQj6VjOtEH4856ux7UXjbL8M4LeyEoqRc8/7vEOcwzbwGyEBWmaVn6TupGYz Fm0gYtHOHGWVHHlMAfxwSiym2+4xob9FcAGLsfjvkXSA+9QW1r6K6YSEcpuXPOggm6 9dFHm/rYNJlQvdh//dEtC+cZqJ11RdElJ0PZtX/5QwZhawec/TjZmd+O4GLLVRB4Wj LIQ89NNhbWaOaa9Q1VtoJ1SdL1tlpwJEt+jDlxHkxS1RVQ4l3DAkJ7BAYWERFdkoBd xlpfmm/5eiNJywG6lwQ36cqtI8uTHJcdXzF24wLUEv6g06EOOxESQVwjlFjHJ63L9p ePKuD6M9P9S/A== From: Niklas Cassel To: Richard Zhu , Lucas Stach , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Marek Vasut , Yoshihiro Shimoda , Geert Uytterhoeven , Magnus Damm , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Cc: Manikanta Maddireddy , Koichiro Den , Damien Le Moal , Niklas Cassel , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 5/9] PCI: dwc: Replace certain BAR_RESERVED with BAR_DISABLED in glue drivers Date: Wed, 25 Feb 2026 18:03:28 +0100 Message-ID: <20260225170324.4033466-16-cassel@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260225170324.4033466-11-cassel@kernel.org> References: <20260225170324.4033466-11-cassel@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5932; i=cassel@kernel.org; h=from:subject; bh=t51Jkp6wyJSs+rLYTTbGJ3ga5qDKsCyESdF4gKHClfs=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGDLna6cU2n43kDqlfECze2N6sEXxUdMNj5RUp/uwfrK4F Fx61+B8RykLgxgXg6yYIovvD5f9xd3uU44r3rGBmcPKBDKEgYtTAG6yKSNDy849xltuhYb0Mpqe 698xoUPpcsGXI+82l7H/6uyvv+AowvDfX2bL5UmPHz/1VW3SEjj/KJHJ+P6R/MN5rtJhj+9c8fD mBgA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260225_090416_186742_06DF842F X-CRM114-Status: GOOD ( 18.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Most DWC based EPC glue drivers that have BARs marked as BAR_RESERVED in epc_features also call dw_pcie_ep_reset_bar() for these reserved BARs in ep->ops->init(). (The only exception is pci-keystone.c.) An EPF driver will be able to get/enable BARs that have been disabled/reset using dw_pcie_ep_reset_bar(), except if the BAR is marked as BAR_RESERVED (see pci_epc_get_next_free_bar()). Thus, all EPC drivers that have BARs marked as BAR_RESERVED in epc_features and call dw_pcie_ep_reset_bar(), should really have these BARs marked as BAR_DISABLED. If dw_pcie_ep_reset_bar() is not called by the glue driver, the BARs are kept as BAR_RESERVED. No EPC drivers outside drivers/pci/controllers/dwc mark their BARs as BAR_RESERVED, so there is nothing to do in non-DWC based EPC drivers. Tested-by: Manikanta Maddireddy Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++------ drivers/pci/controller/dwc/pci-keystone.c | 12 ++++++++++++ drivers/pci/controller/dwc/pcie-rcar-gen4.c | 6 +++--- drivers/pci/controller/dwc/pcie-tegra194.c | 8 ++++---- drivers/pci/controller/dwc/pcie-uniphier-ep.c | 4 ++-- 5 files changed, 27 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index a5b8d0b71677..ec1e3557ca53 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1433,19 +1433,19 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, static const struct pci_epc_features imx8m_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; static const struct pci_epc_features imx8q_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 20fa4dadb82a..278d2dba1db0 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -933,6 +933,18 @@ static const struct pci_epc_features ks_pcie_am654_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, .msix_capable = true, + /* + * TODO: This driver is the only DWC glue driver that had BAR_RESERVED + * BARs, but did not call dw_pcie_ep_reset_bar() for the reserved BARs. + * + * To not change the existing behavior, these BARs were not migrated to + * BAR_DISABLED. If this driver wants the BAR_RESERVED BARs to be + * disabled, it should migrate them to BAR_DISABLED. + * + * If they actually should be enabled, then the driver must also define + * what is behind these reserved BARs, see the definition of struct + * pci_epc_bar_rsvd_region. + */ .bar[BAR_0] = { .type = BAR_RESERVED, }, .bar[BAR_1] = { .type = BAR_RESERVED, }, .bar[BAR_2] = { .type = BAR_RESIZABLE, }, diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c index a6912e85e4dd..9dd05bac22b9 100644 --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c @@ -422,10 +422,10 @@ static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, static const struct pci_epc_features rcar_gen4_pcie_epc_features = { DWC_EPC_COMMON_FEATURES, .msi_capable = true, - .bar[BAR_1] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, + .bar[BAR_1] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, .bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_1M, }; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 31aa9a494dbc..9f9453e8cd23 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1994,10 +1994,10 @@ static const struct pci_epc_features tegra_pcie_epc_features = { .bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M, .only_64bit = true, }, .bar[BAR_1] = { .type = BAR_64BIT_UPPER, }, - .bar[BAR_2] = { .type = BAR_RESERVED, }, - .bar[BAR_3] = { .type = BAR_RESERVED, }, - .bar[BAR_4] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_2] = { .type = BAR_DISABLED, }, + .bar[BAR_3] = { .type = BAR_DISABLED, }, + .bar[BAR_4] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, .align = SZ_64K, }; diff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c index f873a1659592..5bde3ee682b5 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c +++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c @@ -429,8 +429,8 @@ static const struct uniphier_pcie_ep_soc_data uniphier_pro5_data = { .bar[BAR_1] = { .type = BAR_64BIT_UPPER, }, .bar[BAR_2] = { .only_64bit = true, }, .bar[BAR_3] = { .type = BAR_64BIT_UPPER, }, - .bar[BAR_4] = { .type = BAR_RESERVED, }, - .bar[BAR_5] = { .type = BAR_RESERVED, }, + .bar[BAR_4] = { .type = BAR_DISABLED, }, + .bar[BAR_5] = { .type = BAR_DISABLED, }, }, }; -- 2.53.0