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Thu, 26 Feb 2026 03:59:14 -0800 From: Sumit Gupta To: , , , , , , , , , , , , , CC: , , , Subject: [PATCH v3] arm64: topology: Fix false warning in counters_read_on_cpu() for same-CPU reads Date: Thu, 26 Feb 2026 17:29:11 +0530 Message-ID: <20260226115911.1664285-1-sumitg@nvidia.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37E:EE_|SJ1PR12MB6218:EE_ X-MS-Office365-Filtering-Correlation-Id: 35278274-09dd-4052-fc6d-08de752e920a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|82310400026|1800799024|921020|13003099007; X-Microsoft-Antispam-Message-Info: /H8lzh5HWVgQnqw+JPG41oYvG6MHJ2ha6xhLH1Ijl/kHjocTS3m6JDWgTe/oITNPZCYkeIeEX925wVrYyN+lkGVolWS2Xm/Ol6NRyFbFcETKa5MGGhaDPXerMnITSM+K90b7g4oI2bPQCj2eqTKP4HFZ9eKli6QCFzNMelXAtwHTK4lQ+wJOvc9wOvdcAhRSi3dYQ05XFlkNej16qfZcBjUUAENvqCTzdf0ZIHWjj9+ytyyeEG+5A4zIgDevdjAu6IMS/mT0bjLu/tuRZ/SZD3qrhKtnQrXJK7iWDUWHgQOjsHdf6Jxp+t1n4quizmqVMUHADJ89FPSyzreXC8qSR2OfJCfPsZTImxZnw+6FHPWzDyCb+WYqTVSUrU+QUOdXH8+vuo1w2NRlMXb1Ns1lZ7ffHEqo+4jcypnC3n2w8uBHHacA/Yx4xwl7fteJ9E1lQfRyV0rIFu+H1OBr04Ar975oPOjZkhQUIowN/LiVXLD3rNingpfkm8j4SoP9OW0mlDNa179b1NBt7+ubMXGLiO1QplQUy+eL5Na4m1cnDqf48FhnRchCNTsw1C17YWwNUcuau4iOJfi07fGJBArzHr1ka52CCvN9tZpEU18lvHtRWwdyLe86ipAljX5uaqWyb0t/iA0nVuJDNJ+iBWvMdZR/6BtzLqDdryW3503YAcyYBrVqQjwkN5DX/LutRUN/oKO0gR9G3FTkDdO6J1XDE5bpue+51H3CtunU8HgmTry2WZ8vKWPb6Fx/pIaLhCsVm9UpV22byIEBi8XN+i6XKSfdgGUMInF0QkaeP+O0VGFHiBtIpanuvm0SBKtiAOuvoUdyDUHNZoWsGIv93hjcwEjHcv1jUnox/uahiYLhZHk= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(82310400026)(1800799024)(921020)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: t7cg/fg9/c6Qxn0hHjIgywvNKdPIGrf8bRI9B+5L9cWBOBkWHGSVsnbsIiHT4p1G79mFI4KnpLyDxUcDNImqLTE5ttR5TR8pilxDTAdcPc1L4iOLqlUN003qJu3RGXwZrktYGg/+KSavKDHVyizOMUaSa4HDfr4Z+FYU9evwMvBI0YtJ9qVk8mBmoX+n50wUnM6NO8K+uE22HiBdlbmuDDDXunjshnipO9oAuhs2lUZCMyceYpJ5zL4PrYtUv3XqBXyskkIr2Z2/st5GX2MlEDpiNjNXsp01Qyl2fTjFRe8hLdi9wP5PwPYKC2PDmsHU8ysPEIGsX9R9FmK4X0MsbxJZMVzIVU/dLNvu+njB/YPjAxNzLxP1cQ43AaVpuov0hpdUP1JXtUHZMj6XsarQyGkYysNKYvZ/EFuEywecACfy7SRAhkPJTFsLRze7U5SB X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2026 12:00:00.9268 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35278274-09dd-4052-fc6d-08de752e920a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6218 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260226_040012_454029_948DC311 X-CRM114-Status: GOOD ( 14.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The counters_read_on_cpu() function warns when called with IRQs disabled to prevent deadlock in smp_call_function_single(). However, this warning is spurious when reading counters on the current CPU, since no IPI is needed for same CPU reads. Commit 12eb8f4fff24 ("cpufreq: CPPC: Update FIE arch_freq_scale in ticks for non-PCC regs") changed the CPPC Frequency Invariance Engine to read AMU counters directly from the scheduler tick for non-PCC register spaces (like FFH), instead of deferring to a kthread. This means counters_read_on_cpu() is now called with IRQs disabled from the tick handler, triggering the warning. Fix this by restructuring the logic: when IRQs are disabled (tick context), call the function directly for same-CPU reads. Otherwise use smp_call_function_single(). Fixes: 997c021abc6e ("cpufreq: CPPC: Update FIE arch_freq_scale in ticks for non-PCC regs") Suggested-by: Will Deacon Signed-off-by: Sumit Gupta --- v2 -> v3: - If irqs_disabled(), then call directly for same-CPU counter reads. Otherwise use smp_call_function_single(). (Will) - Remove get_cpu()/put_cpu(). (Will) v1 -> v2: - Rebased on v7.0-rc1 - Updated Fixes tag to match upstream commit SHA [1] https://lore.kernel.org/lkml/20260127080700.3565546-1-sumitg@nvidia.com/ [2] https://lore.kernel.org/lkml/20260224092714.1242141-1-sumitg@nvidia.com/ --- arch/arm64/kernel/topology.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 3fe1faab0362..b32f13358fbb 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -400,16 +400,25 @@ static inline int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val) { /* - * Abort call on counterless CPU or when interrupts are - * disabled - can lead to deadlock in smp sync call. + * Abort call on counterless CPU. */ if (!cpu_has_amu_feat(cpu)) return -EOPNOTSUPP; - if (WARN_ON_ONCE(irqs_disabled())) - return -EPERM; - - smp_call_function_single(cpu, func, val, 1); + if (irqs_disabled()) { + /* + * When IRQs are disabled (tick path: sched_tick -> + * topology_scale_freq_tick or cppc_scale_freq_tick), only local + * CPU counter reads are allowed. Remote CPU counter read would + * require smp_call_function_single() which is unsafe with IRQs + * disabled. + */ + if (WARN_ON_ONCE(cpu != smp_processor_id())) + return -EPERM; + func(val); + } else { + smp_call_function_single(cpu, func, val, 1); + } return 0; } -- 2.34.1