From: Chen-Yu Tsai <wens@kernel.org>
To: Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej@kernel.org>,
Samuel Holland <samuel@sholland.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mark Brown <broonie@kernel.org>
Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND
Date: Sat, 28 Feb 2026 01:51:55 +0800 [thread overview]
Message-ID: <20260227175157.2339758-4-wens@kernel.org> (raw)
In-Reply-To: <20260227175157.2339758-1-wens@kernel.org>
The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ
pins with support for QSPI.
Enable spi0 and add a device node for the SPI NAND chip.
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
.../boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
index 7c24121de88f..474354fbfcec 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts
@@ -403,6 +403,21 @@ &rtc {
assigned-clock-rates = <32768>;
};
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pj_pins>, <&spi0_cs0_pj_pin>,
+ <&spi0_hold_pj_pin>, <&spi0_wp_pj_pin>;
+ status = "okay";
+
+ nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
2.47.3
next prev parent reply other threads:[~2026-02-27 17:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-27 17:51 [PATCH 0/3] arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND Chen-Yu Tsai
2026-02-27 17:51 ` [PATCH 1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs Chen-Yu Tsai
2026-02-28 11:08 ` Krzysztof Kozlowski
2026-02-27 17:51 ` [PATCH 2/3] arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pins Chen-Yu Tsai
2026-02-28 19:12 ` Jernej Škrabec
2026-02-27 17:51 ` Chen-Yu Tsai [this message]
2026-02-28 19:12 ` [PATCH 3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND Jernej Škrabec
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260227175157.2339758-4-wens@kernel.org \
--to=wens@kernel.org \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jernej@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=robh@kernel.org \
--cc=samuel@sholland.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox