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charset=utf-8 Content-Disposition: inline In-Reply-To: <20260301070910.6169-2-xueyuan.chen21@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260301_030439_960882_280AC2DF X-CRM114-Status: GOOD ( 18.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Mar 01, 2026 at 03:09:08PM +0800, Xueyuan Chen wrote: > From: Gary Yang > > There are two reset controllers on Cix sky1 Soc. > One is located in S0 domain, and the other is located > in S5 domain. > > [Xueyuan Chen: Refactored to a flat syscon architecture to fix v3 review issues] > > Signed-off-by: Gary Yang > Co-developed-by: Xueyuan Chen > Signed-off-by: Xueyuan Chen > --- > .../bindings/reset/cix,sky1-rst.yaml | 51 ++++++ > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++++++++++++ > 3 files changed, 257 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > > diff --git a/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > new file mode 100644 > index 000000000000..27b6df71c3e4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/cix,sky1-rst.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: CIX Sky1 Reset Register Region > + > +maintainers: > + - Gary Yang > + - Xueyuan Chen > + > +description: | > + An assortment of registers that control elements of the CIX Sky1 SoC, > + including resets, clocks, among others. > + The Reset block acts as a system controller (syscon) and provides > + reset capabilities to various peripherals. > + > +properties: > + compatible: > + items: > + - enum: > + - cix,sky1-src-s5 > + - cix,sky1-src-fch > + - const: syscon I don't understand what is happening here. Something VERY similar was sent as v9 and this is v4. Compatibles look different, yet similar. It looks like you just duplicated a lot bypassing 5 rounds of comments. That would not be acceptable, we don't review just to be ignored. Best regards, Krzysztof