* [PATCH 1/2] perf cs-etm: Finish removal of ETM_OPT_*
2026-03-06 11:24 [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_* James Clark
@ 2026-03-06 11:24 ` James Clark
2026-03-06 12:27 ` Leo Yan
2026-03-06 11:24 ` [PATCH 2/2] tools: Sync coresight-pmu.h header James Clark
2026-03-06 12:28 ` [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_* Leo Yan
2 siblings, 1 reply; 6+ messages in thread
From: James Clark @ 2026-03-06 11:24 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Namhyung Kim, Leo Yan, Suzuki K Poulose,
Mike Leach
Cc: John Garry, Will Deacon, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, coresight, linux-arm-kernel, linux-perf-users,
linux-kernel, James Clark
These #defines have been removed from the kernel headers in favour of
the string based PMU format attributes. Usages were previously removed
from the recording side of cs-etm in Perf. Finish the removal by
removing usages from the decode side too.
It's a straight replacement of the old #defines with the new register
bit definitions. Except cs_etm__setup_timeless_decoding() which wasn't
looking at the saved metadata and was instead hard coding an access to
'attr.config'. This was vulnerable to the same issue of .config being
moved to .config2 etc that the original removal of ETM_OPT_* tried to
fix. So fix that too.
Signed-off-by: James Clark <james.clark@linaro.org>
---
tools/perf/arch/arm/util/cs-etm.c | 14 ----------
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 2 +-
tools/perf/util/cs-etm.c | 36 +++++++++----------------
tools/perf/util/cs-etm.h | 15 +++++++++++
4 files changed, 28 insertions(+), 39 deletions(-)
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index dc3f4e86b075..4418d21708d6 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -68,20 +68,6 @@ static const char * const metadata_ete_ro[] = {
enum cs_etm_version { CS_NOT_PRESENT, CS_ETMV3, CS_ETMV4, CS_ETE };
-/* ETMv4 CONFIGR register bits */
-#define TRCCONFIGR_BB BIT(3)
-#define TRCCONFIGR_CCI BIT(4)
-#define TRCCONFIGR_CID BIT(6)
-#define TRCCONFIGR_VMID BIT(7)
-#define TRCCONFIGR_TS BIT(11)
-#define TRCCONFIGR_RS BIT(12)
-#define TRCCONFIGR_VMIDOPT BIT(15)
-
-/* ETMv3 ETMCR register bits */
-#define ETMCR_CYC_ACC BIT(12)
-#define ETMCR_TIMESTAMP_EN BIT(28)
-#define ETMCR_RETURN_STACK BIT(29)
-
static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu);
static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val);
static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path);
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
index 3050fe212666..212f17a3dc72 100644
--- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
+++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
@@ -549,7 +549,7 @@ cs_etm_decoder__set_tid(struct cs_etm_queue *etmq,
/*
* Process the PE_CONTEXT packets if we have a valid contextID or VMID.
* If the kernel is running at EL2, the PID is traced in CONTEXTIDR_EL2
- * as VMID, Bit ETM_OPT_CTXTID2 is set in this case.
+ * as VMID, Format attribute 'contextid2' is set in this case.
*/
switch (cs_etm__get_pid_fmt(etmq)) {
case CS_ETM_PIDFMT_CTXTID:
diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
index 95f439c96180..6c907c01635b 100644
--- a/tools/perf/util/cs-etm.c
+++ b/tools/perf/util/cs-etm.c
@@ -194,7 +194,7 @@ int cs_etm__get_cpu(struct cs_etm_queue *etmq, u8 trace_chan_id, int *cpu)
* CS_ETM_PIDFMT_CTXTID2: CONTEXTIDR_EL2 is traced.
* CS_ETM_PIDFMT_NONE: No context IDs
*
- * It's possible that the two bits ETM_OPT_CTXTID and ETM_OPT_CTXTID2
+ * It's possible that the two format attributes 'contextid1' and 'contextid2'
* are enabled at the same time when the session runs on an EL2 kernel.
* This means the CONTEXTIDR_EL1 and CONTEXTIDR_EL2 both will be
* recorded in the trace data, the tool will selectively use
@@ -210,15 +210,15 @@ static enum cs_etm_pid_fmt cs_etm__init_pid_fmt(u64 *metadata)
if (metadata[CS_ETM_MAGIC] == __perf_cs_etmv3_magic) {
val = metadata[CS_ETM_ETMCR];
/* CONTEXTIDR is traced */
- if (val & BIT(ETM_OPT_CTXTID))
+ if (val & ETMCR_CTXTID)
return CS_ETM_PIDFMT_CTXTID;
} else {
val = metadata[CS_ETMV4_TRCCONFIGR];
/* CONTEXTIDR_EL2 is traced */
- if (val & (BIT(ETM4_CFG_BIT_VMID) | BIT(ETM4_CFG_BIT_VMID_OPT)))
+ if (val & (TRCCONFIGR_VMID | TRCCONFIGR_VMIDOPT))
return CS_ETM_PIDFMT_CTXTID2;
/* CONTEXTIDR_EL1 is traced */
- else if (val & BIT(ETM4_CFG_BIT_CTXTID))
+ else if (val & TRCCONFIGR_CID)
return CS_ETM_PIDFMT_CTXTID;
}
@@ -2914,29 +2914,19 @@ static int cs_etm__process_auxtrace_event(struct perf_session *session,
return 0;
}
-static int cs_etm__setup_timeless_decoding(struct cs_etm_auxtrace *etm)
+static void cs_etm__setup_timeless_decoding(struct cs_etm_auxtrace *etm,
+ u64 *metadata)
{
- struct evsel *evsel;
- struct evlist *evlist = etm->session->evlist;
-
/* Override timeless mode with user input from --itrace=Z */
if (etm->synth_opts.timeless_decoding) {
etm->timeless_decoding = true;
- return 0;
+ return;
}
- /*
- * Find the cs_etm evsel and look at what its timestamp setting was
- */
- evlist__for_each_entry(evlist, evsel)
- if (cs_etm__evsel_is_auxtrace(etm->session, evsel)) {
- etm->timeless_decoding =
- !(evsel->core.attr.config & BIT(ETM_OPT_TS));
- return 0;
- }
-
- pr_err("CS ETM: Couldn't find ETM evsel\n");
- return -EINVAL;
+ if (metadata[CS_ETM_MAGIC] == __perf_cs_etmv3_magic)
+ etm->timeless_decoding = !(metadata[CS_ETM_ETMCR] & ETMCR_TIMESTAMP_EN);
+ else
+ etm->timeless_decoding = !(metadata[CS_ETMV4_TRCCONFIGR] & TRCCONFIGR_TS);
}
/*
@@ -3499,9 +3489,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event,
etm->auxtrace.evsel_is_auxtrace = cs_etm__evsel_is_auxtrace;
session->auxtrace = &etm->auxtrace;
- err = cs_etm__setup_timeless_decoding(etm);
- if (err)
- return err;
+ cs_etm__setup_timeless_decoding(etm, metadata[0]);
etm->tc.time_shift = tc->time_shift;
etm->tc.time_mult = tc->time_mult;
diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h
index a8caeea720aa..aa9bb4a32eca 100644
--- a/tools/perf/util/cs-etm.h
+++ b/tools/perf/util/cs-etm.h
@@ -230,6 +230,21 @@ struct cs_etm_packet_queue {
/* CoreSight trace ID is currently the bottom 7 bits of the value */
#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0)
+/* ETMv4 CONFIGR register bits */
+#define TRCCONFIGR_BB BIT(3)
+#define TRCCONFIGR_CCI BIT(4)
+#define TRCCONFIGR_CID BIT(6)
+#define TRCCONFIGR_VMID BIT(7)
+#define TRCCONFIGR_TS BIT(11)
+#define TRCCONFIGR_RS BIT(12)
+#define TRCCONFIGR_VMIDOPT BIT(15)
+
+/* ETMv3 ETMCR register bits */
+#define ETMCR_CYC_ACC BIT(12)
+#define ETMCR_CTXTID BIT(14)
+#define ETMCR_TIMESTAMP_EN BIT(28)
+#define ETMCR_RETURN_STACK BIT(29)
+
int cs_etm__process_auxtrace_info(union perf_event *event,
struct perf_session *session);
void cs_etm_get_default_config(const struct perf_pmu *pmu, struct perf_event_attr *attr);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] tools: Sync coresight-pmu.h header
2026-03-06 11:24 [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_* James Clark
2026-03-06 11:24 ` [PATCH 1/2] " James Clark
@ 2026-03-06 11:24 ` James Clark
2026-03-06 12:28 ` [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_* Leo Yan
2 siblings, 0 replies; 6+ messages in thread
From: James Clark @ 2026-03-06 11:24 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, Namhyung Kim, Leo Yan, Suzuki K Poulose,
Mike Leach
Cc: John Garry, Will Deacon, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, coresight, linux-arm-kernel, linux-perf-users,
linux-kernel, James Clark
Update the header to pull in the changes from commit 3285c471d0c0
("coresight: Remove misleading definitions").
Signed-off-by: James Clark <james.clark@linaro.org>
---
tools/include/linux/coresight-pmu.h | 24 ------------------------
1 file changed, 24 deletions(-)
diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h
index 89b0ac0014b0..2e179abe472a 100644
--- a/tools/include/linux/coresight-pmu.h
+++ b/tools/include/linux/coresight-pmu.h
@@ -21,30 +21,6 @@
*/
#define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2))
-/*
- * Below are the definition of bit offsets for perf option, and works as
- * arbitrary values for all ETM versions.
- *
- * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
- * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
- * directly use below macros as config bits.
- */
-#define ETM_OPT_BRANCH_BROADCAST 8
-#define ETM_OPT_CYCACC 12
-#define ETM_OPT_CTXTID 14
-#define ETM_OPT_CTXTID2 15
-#define ETM_OPT_TS 28
-#define ETM_OPT_RETSTK 29
-
-/* ETMv4 CONFIGR programming bits for the ETM OPTs */
-#define ETM4_CFG_BIT_BB 3
-#define ETM4_CFG_BIT_CYCACC 4
-#define ETM4_CFG_BIT_CTXTID 6
-#define ETM4_CFG_BIT_VMID 7
-#define ETM4_CFG_BIT_TS 11
-#define ETM4_CFG_BIT_RETSTK 12
-#define ETM4_CFG_BIT_VMID_OPT 15
-
/*
* Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
* Used to associate a CPU with the CoreSight Trace ID.
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_*
2026-03-06 11:24 [PATCH 0/2] perf cs-etm: Finish removal of ETM_OPT_* James Clark
2026-03-06 11:24 ` [PATCH 1/2] " James Clark
2026-03-06 11:24 ` [PATCH 2/2] tools: Sync coresight-pmu.h header James Clark
@ 2026-03-06 12:28 ` Leo Yan
2 siblings, 0 replies; 6+ messages in thread
From: Leo Yan @ 2026-03-06 12:28 UTC (permalink / raw)
To: James Clark
Cc: Arnaldo Carvalho de Melo, Namhyung Kim, Leo Yan, Suzuki K Poulose,
Mike Leach, John Garry, Will Deacon, Peter Zijlstra, Ingo Molnar,
Mark Rutland, Alexander Shishkin, Jiri Olsa, Ian Rogers,
Adrian Hunter, coresight, linux-arm-kernel, linux-perf-users,
linux-kernel
On Fri, Mar 06, 2026 at 11:24:44AM +0000, Coresight ML wrote:
> Finish removal of ETM_OPT_* defines so the coresight-pmu.h header can
> by synced from the kernel.
>
> Signed-off-by: James Clark <james.clark@linaro.org>
For the series:
Tested-by: Leo Yan <leo.yan@arm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread