From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FD76FED2F1 for ; Thu, 12 Mar 2026 08:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To: References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version: Subject:Date:From:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cFma/4iTrtEjmoeb7dS9Igw/Ltkc/nkEZ6nRhTj2bx0=; b=zL8kPmy4MlSsrecoJ8le1iO0Mp HYT2Wc4smORZQjfLdl3YNWp3tPlHYzH7b8ggWjQZvpzZcBrmJtNJ3Bmj4a85l7mgRDuWPCfnIf2+T tdfT4/IgTEQzFnE6ZexKzCNNm2mxOcljXy1j4v293dEKOQBgYUvCORzIMcDUcid1Wg+KaVDnlxJQX 27zsHJVfTT22cRdwBwrDyzeDO395cEqS91y0d1YC6Y/Ar5p7KOt6ghZgJcMfP4sptueuDfCX7o89M ViF1Td7uQP228QOsUegWnqsaEvlS3Okw7ettnR6oIaBjorNWmHB7MyIeRa0GlhvS0PHWy0RO9r4ih tu3M3sZw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1w0bpl-0000000Dfng-3SYX; Thu, 12 Mar 2026 08:55:57 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1w0bpa-0000000DfgL-16QV for linux-arm-kernel@lists.infradead.org; Thu, 12 Mar 2026 08:55:47 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 52434444FB; Thu, 12 Mar 2026 08:55:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 1C850C4AF0C; Thu, 12 Mar 2026 08:55:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773305745; bh=s/jQ//ebw4KqAvgADgrOOTy/WsLEyB3dmtPaZ6Cpdk8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=vBniA297oYg8KajLVFvenkHnd2/AqyM7uDuIZBqA3G6ly3EpfnHgAEN3IcW/RrPFJ vmGSa8zRB+hyFxkvrycdWtpsV7Ez1Hn9nVmLep1CgwRbz6PdnUNQcRHUusSo6ODcFF 5XGKhXZoI+lN6dybfHdwSDVjcPl4H4GAbF2HIOOMtkh/+sCwXoHMEZ8DS13B4KyBJN hmD6OdrAAkl/vSHBjFBfkhkraMSavZ8/anRATLASiluwSglZtmOmFiDEL8vw9Vusyk 8LMWeg/9YyjiqkFBxbBq8yAIu/QG42rZq5LbdDkK2k0Fr1mdoqtyXK5GND1fJ7apEB BKVKQbs86CLBQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06C7DFED2F4; Thu, 12 Mar 2026 08:55:45 +0000 (UTC) From: Jan Petrous via B4 Relay Date: Thu, 12 Mar 2026 09:55:29 +0100 Subject: [PATCH v11 3/4] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260312-dwmac_multi_irq-v11-3-09621ccb040b@oss.nxp.com> References: <20260312-dwmac_multi_irq-v11-0-09621ccb040b@oss.nxp.com> In-Reply-To: <20260312-dwmac_multi_irq-v11-0-09621ccb040b@oss.nxp.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, rmk+kernel@armlinux.org.uk, vladimir.oltean@nxp.com, boon.khai.ng@altera.com, "Jan Petrous (OSS)" , Conor Dooley X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773305743; l=3563; i=jan.petrous@oss.nxp.com; s=20240922; h=from:subject:message-id; bh=kLYSxXpklZobUHpT1t8sjQ5xcEiZnOpNYJKyrbRsJvE=; b=Ya73RSKInLZM0vgDMMtZhrTlfhsfoe/ktD1Lj6sM/ze+Dn48xS3OxUwbb7N63RMOHGssMW+Y4 cbpKEobIUi1Ad3Ob67fw/xH+ajQx5ksli6Ah6VvV6Bz1yTwCy5hez9P X-Developer-Key: i=jan.petrous@oss.nxp.com; a=ed25519; pk=Ke3wwK7rb2Me9UQRf6vR8AsfJZfhTyoDaxkUCqmSWYY= X-Endpoint-Received: by B4 Relay for jan.petrous@oss.nxp.com/20240922 with auth_id=217 X-Original-From: "Jan Petrous (OSS)" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260312_015546_349415_155BEAFB X-CRM114-Status: GOOD ( 12.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: jan.petrous@oss.nxp.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: "Jan Petrous (OSS)" The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines, set them to allow using Multi-IRQ mode. Reviewed-by: Matthias Brugger Acked-by: Conor Dooley Signed-off-by: Jan Petrous (OSS) --- .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 47 +++++++++++++++++++--- 1 file changed, 42 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml index 1b2934f3c87c..753a04941659 100644 --- a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -# Copyright 2021-2024 NXP +# Copyright 2021-2026 NXP %YAML 1.2 --- $id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml# @@ -16,6 +16,8 @@ description: the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII interface over Pinctrl device or the output can be routed to the embedded SerDes for SGMII connectivity. + The DWMAC instances have connected all RX/TX queues interrupts, + enabling load balancing of data traffic across all CPU cores. properties: compatible: @@ -45,10 +47,25 @@ properties: FlexTimer Modules connect to GMAC_0. interrupts: - maxItems: 1 + minItems: 1 + maxItems: 11 interrupt-names: - const: macirq + oneOf: + - items: + - const: macirq + - items: + - const: macirq + - const: tx-queue-0 + - const: rx-queue-0 + - const: tx-queue-1 + - const: rx-queue-1 + - const: tx-queue-2 + - const: rx-queue-2 + - const: tx-queue-3 + - const: rx-queue-3 + - const: tx-queue-4 + - const: rx-queue-4 clocks: items: @@ -88,8 +105,28 @@ examples: <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ nxp,phy-sel = <&gpr 0x4>; interrupt-parent = <&gic>; - interrupts = ; - interrupt-names = "macirq"; + interrupts = , + /* CHN 0: tx, rx */ + , + , + /* CHN 1: tx, rx */ + , + , + /* CHN 2: tx, rx */ + , + , + /* CHN 3: tx, rx */ + , + , + /* CHN 4: tx, rx */ + , + ; + interrupt-names = "macirq", + "tx-queue-0", "rx-queue-0", + "tx-queue-1", "rx-queue-1", + "tx-queue-2", "rx-queue-2", + "tx-queue-3", "rx-queue-3", + "tx-queue-4", "rx-queue-4"; snps,mtl-rx-config = <&mtl_rx_setup>; snps,mtl-tx-config = <&mtl_tx_setup>; clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>; -- 2.47.0