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[34.125.23.197]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a22d21cf2sm1445876a91.2.2026.03.13.09.49.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 09:49:01 -0700 (PDT) Date: Fri, 13 Mar 2026 16:48:56 +0000 From: Sami Tolvanen To: Carlos Llamas Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Peter Zijlstra , Josh Poimboeuf , Ard Biesheuvel , Mark Rutland , Kees Cook , Quentin Perret , Steven Rostedt , Will McVicker , Sean Christopherson , kernel-team@android.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7] arm64: implement support for static call trampolines Message-ID: <20260313164856.GB213695@google.com> References: <20260313061852.4025964-1-cmllamas@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260313061852.4025964-1-cmllamas@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260313_094903_623602_76FF0847 X-CRM114-Status: GOOD ( 29.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 13, 2026 at 06:18:52AM +0000, Carlos Llamas wrote: > From: Ard Biesheuvel > > Implement arm64 support for the 'unoptimized' static call variety, which > routes all calls through a single trampoline that is patched to perform a > tail call to the selected function. > > Since static call targets may be located in modules loaded out of direct > branching range, we need to use a ADRP/ADD pair to load the branch target > into R16 and use a branch-to-register (BR) instruction to perform an > indirect call. Unlike on x86, there is no pressing need on arm64 to avoid > indirect calls at all cost, but hiding it from the compiler as is done > here does have some benefits: > - the literal is located in .rodata, which gives us the same robustness > advantage that code patching does; > - no performance hit on CFI enabled Clang builds that decorate compiler > emitted indirect calls with branch target validity checks. > > Cc: Peter Zijlstra (Intel) > Signed-off-by: Ard Biesheuvel > Signed-off-by: Carlos Llamas Does this need a Co-developed-by tag as well? > --- > v7: > - Took Ard's v3 patch (as it leaves the code patching logic out) and > rebased it on top of mainline 7.0-rc3. > - Dropped the changes to arch/arm64/lib/insn.c and instead switched to > the (now) existing aarch64_insn_write_literal_u64(). > - Added the RET0 trampoline define which points to the generic stub > __static_call_return0. > - Made the HAVE_STATIC_CALL conditional on CFI as suggested by Ard. > - Added .type and .size sections to the trampoline definition to > support ABI tools. > > arch/arm64/Kconfig | 1 + > arch/arm64/include/asm/static_call.h | 33 ++++++++++++++++++++++++++++ > arch/arm64/kernel/Makefile | 1 + > arch/arm64/kernel/static_call.c | 20 +++++++++++++++++ > arch/arm64/kernel/vmlinux.lds.S | 1 + > 5 files changed, 56 insertions(+) > create mode 100644 arch/arm64/include/asm/static_call.h > create mode 100644 arch/arm64/kernel/static_call.c > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 38dba5f7e4d2..9ea19b74b6c3 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -252,6 +252,7 @@ config ARM64 > select HAVE_RSEQ > select HAVE_RUST if RUSTC_SUPPORTS_ARM64 > select HAVE_STACKPROTECTOR > + select HAVE_STATIC_CALL if CFI > select HAVE_SYSCALL_TRACEPOINTS > select HAVE_KPROBES > select HAVE_KRETPROBES > diff --git a/arch/arm64/include/asm/static_call.h b/arch/arm64/include/asm/static_call.h > new file mode 100644 > index 000000000000..331580542fd4 > --- /dev/null > +++ b/arch/arm64/include/asm/static_call.h > @@ -0,0 +1,33 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_STATIC_CALL_H > +#define _ASM_STATIC_CALL_H > + > +#define __ARCH_DEFINE_STATIC_CALL_TRAMP(name, target) \ > + asm(" .pushsection .static_call.text, \"ax\" \n" \ > + " .align 3 \n" \ > + " .globl " STATIC_CALL_TRAMP_STR(name) " \n" \ > + STATIC_CALL_TRAMP_STR(name) ": \n" \ > + " hint 34 /* BTI C */ \n" \ It doesn't really matter either way, but do we still support toolchains that don't understand "bti c"? Otherwise looks good to me, and definitely a much better way to solve this issue: Reviewed-by: Sami Tolvanen Sami