From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 956D1F4645C for ; Mon, 16 Mar 2026 12:14:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jB+RemL3Pk8PFFcu2obc8ovkfjIzseACUPlWgi1xPjo=; b=wsbwuAj3v5wFUKmoOwKzdGMvL4 5kiV6fRf27YkOC5wOdB/yAw3XB1ZABG4u01HUfqh+5KaBSJOQSO+41E++y6gqZDkpdVc8BUHcwCKP NOkPyS4ygp3L5XZSMGwZAPnZYUUpaNhT5x5N+11NMqM1sqQONYWB3CHpwZJTR5+Il8dC2KMiJgVC7 UPk9mcp0yxS+42pIgdmCaoRNyiRgXVZQV+OiaAzBL/hZQP++jnZaSURqoxWGYyUznqtbraND5gM85 y3tWESmmL+Gggf7QvSIsHSIIbVLCX47WaZgt9iVE53/IC+KodNQ6cV0PDUuRk69lpT/FiuquMS+g2 x8IIIagQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1w26pn-00000003vP7-0CzJ; Mon, 16 Mar 2026 12:14:11 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1w26pk-00000003vMA-2X4y; Mon, 16 Mar 2026 12:14:09 +0000 Received: from CPC-namja-026ON.redmond.corp.microsoft.com (unknown [4.213.232.19]) by linux.microsoft.com (Postfix) with ESMTPSA id 1219420B6F12; Mon, 16 Mar 2026 05:14:00 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 1219420B6F12 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1773663247; bh=jB+RemL3Pk8PFFcu2obc8ovkfjIzseACUPlWgi1xPjo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cSQ16MVj4newgvduGvn6HO5LY8y/IM488Ga/wfFvNxsMmRIrMVhJbDA0bFdOGID8j 01S3ewI3UDGQTajSrNTPDhUwZPxE/ErNp/QuudR67eGucLFjbSFhYtwssr5mtWtjFL qarbXKOqrRPQCEJeNtLfBJeb0FSsf0JoDU5lmdHk= From: Naman Jain To: "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Catalin Marinas , Will Deacon , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H . Peter Anvin" , Arnd Bergmann , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: Marc Zyngier , Timothy Hayes , Lorenzo Pieralisi , mrigendrachaubey , Naman Jain , ssengar@linux.microsoft.com, Michael Kelley , linux-hyperv@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 10/11] Drivers: hv: Add support for arm64 in MSHV_VTL Date: Mon, 16 Mar 2026 12:12:40 +0000 Message-ID: <20260316121241.910764-11-namjain@linux.microsoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260316121241.910764-1-namjain@linux.microsoft.com> References: <20260316121241.910764-1-namjain@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260316_051408_734893_5FF5F9F4 X-CRM114-Status: GOOD ( 15.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add necessary support to make MSHV_VTL work for arm64 architecture. * Add stub implementation for mshv_vtl_return_call_init(): not required for arm64 * Remove fpu/legacy.h header inclusion, as this is not required * handle HV_REGISTER_VSM_CODE_PAGE_OFFSETS register: not supported in arm64 * Configure custom percpu_vmbus_handler by using hv_setup_percpu_vmbus_handler() * Handle hugepage functions by config checks Signed-off-by: Roman Kisel Signed-off-by: Naman Jain --- arch/arm64/include/asm/mshyperv.h | 2 ++ drivers/hv/mshv_vtl_main.c | 21 ++++++++++++++------- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/mshyperv.h index 36803f0386cc..027a7f062d70 100644 --- a/arch/arm64/include/asm/mshyperv.h +++ b/arch/arm64/include/asm/mshyperv.h @@ -83,6 +83,8 @@ static inline int hv_vtl_get_set_reg(struct hv_register_assoc *regs, bool set, u return 1; } +static inline void mshv_vtl_return_call_init(u64 vtl_return_offset) {} + void mshv_vtl_return_call(struct mshv_vtl_cpu_context *vtl0); bool hv_vtl_configure_reg_page(struct mshv_vtl_per_cpu *per_cpu); #endif diff --git a/drivers/hv/mshv_vtl_main.c b/drivers/hv/mshv_vtl_main.c index 4c9ae65ad3e8..5702fe258500 100644 --- a/drivers/hv/mshv_vtl_main.c +++ b/drivers/hv/mshv_vtl_main.c @@ -23,8 +23,6 @@ #include #include #include - -#include "../../kernel/fpu/legacy.h" #include "mshv.h" #include "mshv_vtl.h" #include "hyperv_vmbus.h" @@ -206,18 +204,21 @@ static void mshv_vtl_synic_enable_regs(unsigned int cpu) static int mshv_vtl_get_vsm_regs(void) { struct hv_register_assoc registers[2]; - int ret, count = 2; + int ret, count = 0; - registers[0].name = HV_REGISTER_VSM_CODE_PAGE_OFFSETS; - registers[1].name = HV_REGISTER_VSM_CAPABILITIES; + registers[count++].name = HV_REGISTER_VSM_CAPABILITIES; + /* Code page offset register is not supported on ARM */ + if (IS_ENABLED(CONFIG_X86_64)) + registers[count++].name = HV_REGISTER_VSM_CODE_PAGE_OFFSETS; ret = hv_call_get_vp_registers(HV_VP_INDEX_SELF, HV_PARTITION_ID_SELF, count, input_vtl_zero, registers); if (ret) return ret; - mshv_vsm_page_offsets.as_uint64 = registers[0].value.reg64; - mshv_vsm_capabilities.as_uint64 = registers[1].value.reg64; + mshv_vsm_capabilities.as_uint64 = registers[0].value.reg64; + if (IS_ENABLED(CONFIG_X86_64)) + mshv_vsm_page_offsets.as_uint64 = registers[1].value.reg64; return ret; } @@ -280,10 +281,13 @@ static int hv_vtl_setup_synic(void) /* Use our isr to first filter out packets destined for userspace */ hv_setup_vmbus_handler(mshv_vtl_vmbus_isr); + /* hv_setup_vmbus_handler() is stubbed for ARM64, add per-cpu VMBus handlers instead */ + hv_setup_percpu_vmbus_handler(mshv_vtl_vmbus_isr); ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "hyperv/vtl:online", mshv_vtl_alloc_context, NULL); if (ret < 0) { + hv_setup_percpu_vmbus_handler(vmbus_isr); hv_setup_vmbus_handler(vmbus_isr); return ret; } @@ -296,6 +300,7 @@ static int hv_vtl_setup_synic(void) static void hv_vtl_remove_synic(void) { cpuhp_remove_state(mshv_vtl_cpuhp_online); + hv_setup_percpu_vmbus_handler(vmbus_isr); hv_setup_vmbus_handler(vmbus_isr); } @@ -1080,10 +1085,12 @@ static vm_fault_t mshv_vtl_low_huge_fault(struct vm_fault *vmf, unsigned int ord ret = vmf_insert_pfn_pmd(vmf, pfn, vmf->flags & FAULT_FLAG_WRITE); return ret; +#if defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) case PUD_ORDER: if (can_fault(vmf, PUD_SIZE, &pfn)) ret = vmf_insert_pfn_pud(vmf, pfn, vmf->flags & FAULT_FLAG_WRITE); return ret; +#endif default: return VM_FAULT_SIGBUS; -- 2.43.0