[PATCH v2 0/7] ARM: dts: broadcom-bcmbca: Fixes amd I2C buses

[PATCH v2 0/7] ARM: dts: broadcom-bcmbca: Fixes amd I2C buses

[Linus Walleij]

This fixes some of my own errors in assigning IRQs to the
32bit ARM BCMBCA peripherals, and adds the I2C bus to the
32bit BCMBCA machines.

Maybe the first fix patches should be applied separately,
I don't think there are many users so I think these can
just be applied as regular patches for -next.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Changes in v2:
- Went over the bogus IRQ assignments, tried to understand
  properly what IRQ number should be used in each case.
- Removed a patch that fixed things broken.
- Fixed the IRQ numbers everywhere, also tried to explain
  in some commit messages how they are deduced.
- Use the brcm,brcmper compatible for these I2C blocks instead
  of brcm,brcmstb, as they likely have byte-sized FIFOs.
- Link to v1: https://lore.kernel.org/r/20250901-bcmbca-i2c-dts-v1-0-ad81f60d4276@linaro.org

---
Linus Walleij (7):
      ARM: dts: bcm6878: Fix PL081 DMA block IRQ
      ARM: dts: bcm63138: Fix DMA IRQ
      ARM: dts: bcm6846: Add I2C bus block
      ARM: dts: bcm6855: Add I2C bus blocks
      ARM: dts: bcm6878: Add I2C bus block
      ARM: dts: bcm63138: Add I2C block
      ARM: dts: bcm63148: Add I2C block

 arch/arm/boot/dts/broadcom/bcm63138.dtsi | 11 ++++++++++-
 arch/arm/boot/dts/broadcom/bcm63148.dtsi | 11 ++++++++++-
 arch/arm/boot/dts/broadcom/bcm6846.dtsi  |  9 +++++++++
 arch/arm/boot/dts/broadcom/bcm6855.dtsi  | 18 ++++++++++++++++++
 arch/arm/boot/dts/broadcom/bcm6878.dtsi  | 11 ++++++++++-
 5 files changed, 57 insertions(+), 3 deletions(-)
---
base-commit: 05f7e89ab9731565d8a62e3b5d1ec206485eeb0b
change-id: 20250901-bcmbca-i2c-dts-1df63defc310

Best regards,
-- 
Linus Walleij <linusw@kernel.org>

[PATCH v2 1/7] ARM: dts: bcm6878: Fix PL081 DMA block IRQ

[Linus Walleij]

SPI_TABLE_OFFSET_2 is 96 in 6878.  96+30 = 126.
Convert back dtsi SPI interrupt 126 - 32 = 94

Reviewed-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm6878.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
index dd837bf69390..5a37bfd7f53f 100644
--- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
@@ -244,7 +244,7 @@ pl081_dma: dma-controller@11000 {
 			// The magic B105F00D info is missing
 			arm,primecell-periphid = <0x00041081>;
 			reg = <0x11000 0x1000>;
-			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 			memcpy-burst-size = <256>;
 			memcpy-bus-width = <32>;
 			clocks = <&periph_clk>;

-- 
2.53.0

Re: [PATCH v2 1/7] ARM: dts: bcm6878: Fix PL081 DMA block IRQ

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:48 +0100, Linus Walleij <linusw@kernel.org> wrote:
> SPI_TABLE_OFFSET_2 is 96 in 6878.  96+30 = 126.
> Convert back dtsi SPI interrupt 126 - 32 = 94
> 
> Reviewed-by: William Zhang <william.zhang@broadcom.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

[PATCH v2 2/7] ARM: dts: bcm63138: Fix DMA IRQ

[Linus Walleij]

INTERRUPT_ID_PL081 is (ISR_TABLE_3_OFFSET + 23)
which is 96+3 = 119, convert back to SPI interrupt
119-32 = 87.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm63138.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
index 4ec568586b14..8e41c7130406 100644
--- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
@@ -317,7 +317,7 @@ pl081_dma: dma-controller@d000 {
 			// The magic B105F00D info is missing
 			arm,primecell-periphid = <0x00041081>;
 			reg = <0xd000 0x1000>;
-			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 			memcpy-burst-size = <256>;
 			memcpy-bus-width = <32>;
 			clocks = <&periph_clk>;

-- 
2.53.0

Re: [PATCH v2 2/7] ARM: dts: bcm63138: Fix DMA IRQ

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1238 bytes --]

On Wed, Feb 18, 2026 at 1:30 AM Linus Walleij <linusw@kernel.org> wrote:
>
> INTERRUPT_ID_PL081 is (ISR_TABLE_3_OFFSET + 23)
> which is 96+3 = 119, convert back to SPI interrupt
> 119-32 = 87.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63138.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> index 4ec568586b14..8e41c7130406 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> @@ -317,7 +317,7 @@ pl081_dma: dma-controller@d000 {
>                         // The magic B105F00D info is missing
>                         arm,primecell-periphid = <0x00041081>;
>                         reg = <0xd000 0x1000>;
> -                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>                         memcpy-burst-size = <256>;
>                         memcpy-bus-width = <32>;
>                         clocks = <&periph_clk>;
>
> --
> 2.53.0
>
Reviewed-by: William Zhang <william.zhang@broadcom.com>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 2/7] ARM: dts: bcm63138: Fix DMA IRQ

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:49 +0100, Linus Walleij <linusw@kernel.org> wrote:
> INTERRUPT_ID_PL081 is (ISR_TABLE_3_OFFSET + 23)
> which is 96+3 = 119, convert back to SPI interrupt
> 119-32 = 87.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

[PATCH v2 3/7] ARM: dts: bcm6846: Add I2C bus block

[Linus Walleij]

The BCM6846 has a brcmper I2C block.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm6846.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
index f5591a45d2e4..47f177323c18 100644
--- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
@@ -242,6 +242,15 @@ mdio: mdio@2060 {
 			status = "disabled";
 		};
 
+		i2c0: i2c@2100 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0x2100 0x60>;
+			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		pl081_dma: dma-controller@59000 {
 			compatible = "arm,pl081", "arm,primecell";
 			// The magic B105F00D info is missing

-- 
2.53.0

Re: [PATCH v2 3/7] ARM: dts: bcm6846: Add I2C bus block

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1294 bytes --]

On Wed, Feb 18, 2026 at 1:30 AM Linus Walleij <linusw@kernel.org> wrote:
>
> The BCM6846 has a brcmper I2C block.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm6846.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
> index f5591a45d2e4..47f177323c18 100644
> --- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi
> @@ -242,6 +242,15 @@ mdio: mdio@2060 {
>                         status = "disabled";
>                 };
>
> +               i2c0: i2c@2100 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0x2100 0x60>;
> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 pl081_dma: dma-controller@59000 {
>                         compatible = "arm,pl081", "arm,primecell";
>                         // The magic B105F00D info is missing
>
> --
> 2.53.0
>
Reviewed-by: William Zhang <william.zhang@broadcom.com>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 3/7] ARM: dts: bcm6846: Add I2C bus block

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:50 +0100, Linus Walleij <linusw@kernel.org> wrote:
> The BCM6846 has a brcmper I2C block.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

[PATCH v2 4/7] ARM: dts: bcm6855: Add I2C bus blocks

[Linus Walleij]

The BCM6855 has two brcmper I2C blocks, the second one in
the PERF1 area at 0xff85a800, this is covered by the
current bus range.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm6855.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
index a88c3f0fbcb0..b3c4cd24ce53 100644
--- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
@@ -240,6 +240,15 @@ nandcs: nand@0 {
 			};
 		};
 
+		i2c0: i2c@2100 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0x2100 0x60>;
+			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		leds: led-controller@3000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -278,5 +287,14 @@ uart1: serial@13000 {
 			clock-names = "uartclk", "apb_pclk";
 			status = "disabled";
 		};
+
+		i2c1: i2c@5a800 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0x5a800 0x60>;
+			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
 	};
 };

-- 
2.53.0

Re: [PATCH v2 4/7] ARM: dts: bcm6855: Add I2C bus blocks

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1932 bytes --]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
>
> The BCM6855 has two brcmper I2C blocks, the second one in
> the PERF1 area at 0xff85a800, this is covered by the
> current bus range.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm6855.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
> index a88c3f0fbcb0..b3c4cd24ce53 100644
> --- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi
> @@ -240,6 +240,15 @@ nandcs: nand@0 {
>                         };
>                 };
>
> +               i2c0: i2c@2100 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0x2100 0x60>;
> +                       interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 leds: led-controller@3000 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> @@ -278,5 +287,14 @@ uart1: serial@13000 {
>                         clock-names = "uartclk", "apb_pclk";
>                         status = "disabled";
>                 };
> +
> +               i2c1: i2c@5a800 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0x5a800 0x60>;
> +                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
>         };
>  };
>
> --
> 2.53.0
>

Reviewed-by: William Zhang <william.zhang@broadcom.com>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 4/7] ARM: dts: bcm6855: Add I2C bus blocks

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:51 +0100, Linus Walleij <linusw@kernel.org> wrote:
> The BCM6855 has two brcmper I2C blocks, the second one in
> the PERF1 area at 0xff85a800, this is covered by the
> current bus range.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

[PATCH v2 5/7] ARM: dts: bcm6878: Add I2C bus block

[Linus Walleij]

The BCM6878 has an brcmper I2C block.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm6878.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
index 5a37bfd7f53f..e7fb45ae1d49 100644
--- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
@@ -239,6 +239,15 @@ nandcs: nand@0 {
 			};
 		};
 
+		i2c0: i2c@2100 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0x2100 0x60>;
+			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		pl081_dma: dma-controller@11000 {
 			compatible = "arm,pl081", "arm,primecell";
 			// The magic B105F00D info is missing

-- 
2.53.0

Re: [PATCH v2 5/7] ARM: dts: bcm6878: Add I2C bus block

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1276 bytes --]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
>
> The BCM6878 has an brcmper I2C block.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm6878.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> index 5a37bfd7f53f..e7fb45ae1d49 100644
> --- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi
> @@ -239,6 +239,15 @@ nandcs: nand@0 {
>                         };
>                 };
>
> +               i2c0: i2c@2100 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0x2100 0x60>;
> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 pl081_dma: dma-controller@11000 {
>                         compatible = "arm,pl081", "arm,primecell";
>                         // The magic B105F00D info is missing
>
> --
> 2.53.0
>
Reviewed-by: William Zhang <william.zhang@broadcom.com>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 5/7] ARM: dts: bcm6878: Add I2C bus block

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:52 +0100, Linus Walleij <linusw@kernel.org> wrote:
> The BCM6878 has an brcmper I2C block.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

[PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[Linus Walleij]

The BCM63138 has a brcmper I2C block.

The interrupt is at INTERRUPT_ID_I2C whic is
(ISR_TABLE3_OFFSET + 19) = 96+115, convert back
to SPI interrupt 115-32 = 83.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm63138.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
index 8e41c7130406..4ca4ec2ffed6 100644
--- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
@@ -312,6 +312,15 @@ bootlut: bootlut@8000 {
 			reg = <0x8000 0x50>;
 		};
 
+		i2c0: i2c@be00 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0xbe00 0x60>;
+			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		pl081_dma: dma-controller@d000 {
 			compatible = "arm,pl081", "arm,primecell";
 			// The magic B105F00D info is missing

-- 
2.53.0

Re: [PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1617 bytes --]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
>
> The BCM63138 has a brcmper I2C block.
I remember there was some discussion on whether this driver really
works on DSL chips.
Did you have any way to test it?

>
> The interrupt is at INTERRUPT_ID_I2C whic is
> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
> to SPI interrupt 115-32 = 83.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63138.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> index 8e41c7130406..4ca4ec2ffed6 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> @@ -312,6 +312,15 @@ bootlut: bootlut@8000 {
>                         reg = <0x8000 0x50>;
>                 };
>
> +               i2c0: i2c@be00 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0xbe00 0x60>;
reg offset 0x3e00 as  the translation window starts from 0xfffe8000.
Patch for 63148 has the same issue.

> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 pl081_dma: dma-controller@d000 {
>                         compatible = "arm,pl081", "arm,primecell";
>                         // The magic B105F00D info is missing
>
> --
> 2.53.0
>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[Florian Fainelli]

On 2/19/26 10:29, William Zhang wrote:
> On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
>>
>> The BCM63138 has a brcmper I2C block.
> I remember there was some discussion on whether this driver really
> works on DSL chips.
> Did you have any way to test it?

I did a long time back and staged my changes in this branch:

https://github.com/torvalds/linux/compare/master...ffainelli:linux:bcm63148

where the SFP could be discovered properly on the BCM963148REF board.

> 
>>
>> The interrupt is at INTERRUPT_ID_I2C whic is
>> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
>> to SPI interrupt 115-32 = 83.
>>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
>>   arch/arm/boot/dts/broadcom/bcm63138.dtsi | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
>> index 8e41c7130406..4ca4ec2ffed6 100644
>> --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
>> +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
>> @@ -312,6 +312,15 @@ bootlut: bootlut@8000 {
>>                          reg = <0x8000 0x50>;
>>                  };
>>
>> +               i2c0: i2c@be00 {
>> +                       compatible = "brcm,brcmper-i2c";
>> +                       reg = <0xbe00 0x60>;
> reg offset 0x3e00 as  the translation window starts from 0xfffe8000.
> Patch for 63148 has the same issue.

Agreed, offset 0x3e00 is also what I used:

https://github.com/torvalds/linux/commit/01e1e67b294127562294802914ca0741ae7808f8

> 
>> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>> +                       #address-cells = <1>;
>> +                       #size-cells = <0>;
>> +                       status = "disabled";
>> +               };
>> +
>>                  pl081_dma: dma-controller@d000 {
>>                          compatible = "arm,pl081", "arm,primecell";
>>                          // The magic B105F00D info is missing
>>
>> --
>> 2.53.0
>>


-- 
Florian

Re: [PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 2418 bytes --]

On Mon, Mar 16, 2026 at 1:53 PM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 2/19/26 10:29, William Zhang wrote:
> > On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
> >>
> >> The BCM63138 has a brcmper I2C block.
> > I remember there was some discussion on whether this driver really
> > works on DSL chips.
> > Did you have any way to test it?
>
> I did a long time back and staged my changes in this branch:
>
> https://github.com/torvalds/linux/compare/master...ffainelli:linux:bcm63148
>
> where the SFP could be discovered properly on the BCM963148REF board.
>
Great to hear it works on the 63148 board.  Then it should be fine for
other chips as well as they share the same ip block.

> >
> >>
> >> The interrupt is at INTERRUPT_ID_I2C whic is
> >> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
> >> to SPI interrupt 115-32 = 83.
> >>
> >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> >> ---
> >>   arch/arm/boot/dts/broadcom/bcm63138.dtsi | 9 +++++++++
> >>   1 file changed, 9 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> >> index 8e41c7130406..4ca4ec2ffed6 100644
> >> --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> >> +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> >> @@ -312,6 +312,15 @@ bootlut: bootlut@8000 {
> >>                          reg = <0x8000 0x50>;
> >>                  };
> >>
> >> +               i2c0: i2c@be00 {
> >> +                       compatible = "brcm,brcmper-i2c";
> >> +                       reg = <0xbe00 0x60>;
> > reg offset 0x3e00 as  the translation window starts from 0xfffe8000.
> > Patch for 63148 has the same issue.
>
> Agreed, offset 0x3e00 is also what I used:
>
> https://github.com/torvalds/linux/commit/01e1e67b294127562294802914ca0741ae7808f8
>
> >
> >> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> >> +                       #address-cells = <1>;
> >> +                       #size-cells = <0>;
> >> +                       status = "disabled";
> >> +               };
> >> +
> >>                  pl081_dma: dma-controller@d000 {
> >>                          compatible = "arm,pl081", "arm,primecell";
> >>                          // The magic B105F00D info is missing
> >>
> >> --
> >> 2.53.0
> >>
>
>
> --
> Florian

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:53 +0100, Linus Walleij <linusw@kernel.org> wrote:
> The BCM63138 has a brcmper I2C block.
> 
> The interrupt is at INTERRUPT_ID_I2C whic is
> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
> to SPI interrupt 115-32 = 83.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

Re: [PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[Florian Fainelli]

On 3/17/26 10:49, Florian Fainelli wrote:
> From: Florian Fainelli <f.fainelli@gmail.com>
> 
> On Wed, 18 Feb 2026 10:30:53 +0100, Linus Walleij <linusw@kernel.org> wrote:
>> The BCM63138 has a brcmper I2C block.
>>
>> The interrupt is at INTERRUPT_ID_I2C whic is
>> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
>> to SPI interrupt 115-32 = 83.
>>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
> 
> Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!

Offset was adjusted by upon William's feedback, FWIW.
-- 
Florian

[PATCH v2 7/7] ARM: dts: bcm63148: Add I2C block

[Linus Walleij]

The BCM63148 has a brcmper I2C block.

The peripheral range needs to be extended to accommodate
it. The Boot LUT is at offset + 0x10000 so extend it to
cover at least that too, 128 KB.

INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
convert back to SPI IRQ 115-32 = 83.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/broadcom/bcm63148.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
index e071cddb28fc..52aea853095c 100644
--- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
@@ -97,7 +97,7 @@ bus@ff800000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
-		ranges = <0 0xfffe8000 0x8000>;
+		ranges = <0 0xfffe8000 0x20000>;
 
 		/* GPIOs 0 .. 31 */
 		gpio0: gpio@100 {
@@ -197,5 +197,14 @@ nandcs: nand@0 {
 				reg = <0>;
 			};
 		};
+
+		i2c0: i2c@be00 {
+			compatible = "brcm,brcmper-i2c";
+			reg = <0xbe00 0x60>;
+			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
 	};
 };

-- 
2.53.0

Re: [PATCH v2 7/7] ARM: dts: bcm63148: Add I2C block

[William Zhang]

[-- Attachment #1: Type: text/plain, Size: 1765 bytes --]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw@kernel.org> wrote:
>
> The BCM63148 has a brcmper I2C block.
>
> The peripheral range needs to be extended to accommodate
> it. The Boot LUT is at offset + 0x10000 so extend it to
> cover at least that too, 128 KB.
>
> INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
> convert back to SPI IRQ 115-32 = 83.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> index e071cddb28fc..52aea853095c 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> @@ -97,7 +97,7 @@ bus@ff800000 {
>                 compatible = "simple-bus";
>                 #address-cells = <1>;
>                 #size-cells = <1>;
> -               ranges = <0 0xfffe8000 0x8000>;
> +               ranges = <0 0xfffe8000 0x20000>;
>
>                 /* GPIOs 0 .. 31 */
>                 gpio0: gpio@100 {
> @@ -197,5 +197,14 @@ nandcs: nand@0 {
>                                 reg = <0>;
>                         };
>                 };
> +
> +               i2c0: i2c@be00 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0xbe00 0x60>;
Same as 63138. Should be 0x3e00.

> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
>         };
>  };
>
> --
> 2.53.0
>

[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5473 bytes --]

Re: [PATCH v2 7/7] ARM: dts: bcm63148: Add I2C block

[Florian Fainelli]

From: Florian Fainelli <f.fainelli@gmail.com>

On Wed, 18 Feb 2026 10:30:54 +0100, Linus Walleij <linusw@kernel.org> wrote:
> The BCM63148 has a brcmper I2C block.
> 
> The peripheral range needs to be extended to accommodate
> it. The Boot LUT is at offset + 0x10000 so extend it to
> cover at least that too, 128 KB.
> 
> INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
> convert back to SPI IRQ 115-32 = 83.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

Re: [PATCH v2 7/7] ARM: dts: bcm63148: Add I2C block

[Florian Fainelli]

On 3/17/26 10:50, Florian Fainelli wrote:
> From: Florian Fainelli <f.fainelli@gmail.com>
> 
> On Wed, 18 Feb 2026 10:30:54 +0100, Linus Walleij <linusw@kernel.org> wrote:
>> The BCM63148 has a brcmper I2C block.
>>
>> The peripheral range needs to be extended to accommodate
>> it. The Boot LUT is at offset + 0x10000 so extend it to
>> cover at least that too, 128 KB.
>>
>> INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115,
>> convert back to SPI IRQ 115-32 = 83.
>>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
> 
> Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!

Offset was adjusted by upon William's feedback, FWIW.
-- 
Florian