From: Jun Guo <jun.guo@cixtech.com>
To: peter.chen@cixtech.com, fugang.duan@cixtech.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,
ychuang3@nuvoton.com, schung@nuvoton.com, robin.murphy@arm.com,
Frank.Li@kernel.org
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
linux-arm-kernel@lists.infradead.org,
Jun Guo <jun.guo@cixtech.com>
Subject: [PATCH v5 0/3] dmaengine: arm-dma350: support combined IRQ mode with runtime IRQ topology detection
Date: Tue, 24 Mar 2026 20:01:10 +0800 [thread overview]
Message-ID: <20260324120113.3681830-1-jun.guo@cixtech.com> (raw)
DMA-350 can be integrated with either one interrupt per channel or a
single combined interrupt for all channels. This series adds support
for the combined IRQ topology while keeping compatibility with the
per-channel topology.
Patch 1 updates the DT binding to describe both interrupt topologies
(1 combined IRQ or 8 per-channel IRQs).
Patch 2 updates the driver to detect IRQ topology at runtime via
platform_irq_count(), handle both modes in one code path, and enable
DMANSECCTRL.INTREN_ANYCHINTR only in combined IRQ mode.
Patch 3 adds the Sky1 DMA DT node using the combined IRQ topology.
Tested on CIX SKY1 with dmatest:
% echo 2000 > /sys/module/dmatest/parameters/timeout
% echo 1 > /sys/module/dmatest/parameters/iterations
% echo "" > /sys/module/dmatest/parameters/channel
% echo 1 > /sys/module/dmatest/parameters/run
Changes in v5:
- Fix the formatting issue in the AI tag.
- Remove the unnecessary "cix,sky1-dma-350".
Changes in v4:
- Reword binding text to align with kernel style.
- Revise the AI attribution to the standard format.
- Remove redundant links from the commit log.
Changes in v3:
- Rework binding compatible description to match generic-first model.
- Keep interrupts schema support for both 1-IRQ and 8-IRQ topologies.
- Drop SoC match-data dependency for IRQ mode selection.
- Detect IRQ topology via platform_irq_count() in probe path.
- Refactor IRQ handling into a shared channel handler.
- Enable DMANSECCTRL.INTREN_ANYCHINTR only in combined IRQ mode.
Changes in v2:
- Update to kernel standards, enhance patch description, and refactor
driver to use match data for hardware differentiation instead of
compatible strings.
Jun Guo (3):
dt-bindings: dma: arm-dma350: document combined and per-channel IRQ
topologies
dma: arm-dma350: support combined IRQ mode with runtime IRQ topology
detection
arm64: dts: cix: add DT nodes for DMA
.../devicetree/bindings/dma/arm,dma-350.yaml | 25 ++-
arch/arm64/boot/dts/cix/sky1.dtsi | 7 +
drivers/dma/arm-dma350.c | 164 +++++++++++++++---
3 files changed, 161 insertions(+), 35 deletions(-)
--
2.34.1
next reply other threads:[~2026-03-24 12:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 12:01 Jun Guo [this message]
2026-03-24 12:01 ` [PATCH v5 1/3] dt-bindings: dma: arm-dma350: document combined and per-channel IRQ topologies Jun Guo
2026-03-24 12:01 ` [PATCH v5 2/3] dma: arm-dma350: support combined IRQ mode with runtime IRQ topology detection Jun Guo
2026-03-24 12:01 ` [PATCH v5 3/3] arm64: dts: cix: add DT nodes for DMA Jun Guo
2026-03-24 13:36 ` [PATCH v5 0/3] dmaengine: arm-dma350: support combined IRQ mode with runtime IRQ topology detection Robin Murphy
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