* [PATCH v4 1/6] dt-bindings: display: mediatek: gamma: Add support for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
@ 2026-03-24 12:51 ` Jay Liu
2026-03-24 12:51 ` [PATCH v4 2/6] dt-bindings: display: mediatek: dither: " Jay Liu
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:51 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
Add a compatible string for the GAMMA IP found in the MT8196 SoC.
Each GAMMA IP of this SoC is fully compatible with the ones found
in MT8195.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
index 48542dc7e784..513e51c6d2b9 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
@@ -40,6 +40,7 @@ properties:
- items:
- enum:
- mediatek,mt8188-disp-gamma
+ - mediatek,mt8196-disp-gamma
- const: mediatek,mt8195-disp-gamma
reg:
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v4 2/6] dt-bindings: display: mediatek: dither: Add support for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
2026-03-24 12:51 ` [PATCH v4 1/6] dt-bindings: display: mediatek: gamma: Add support " Jay Liu
@ 2026-03-24 12:51 ` Jay Liu
2026-03-24 12:52 ` [PATCH v4 3/6] dt-bindings: display: mediatek: ccorr: " Jay Liu
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:51 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
Add a compatible string for the DITHER IP found in the MT8196 SoC.
Each DITHER IP of this SoC is fully compatible with the ones found
in MT8183.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,dither.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
index abaf27916d13..25ef7d0c2a2b 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
@@ -30,6 +30,7 @@ properties:
- mediatek,mt8188-disp-dither
- mediatek,mt8192-disp-dither
- mediatek,mt8195-disp-dither
+ - mediatek,mt8196-disp-dither
- mediatek,mt8365-disp-dither
- const: mediatek,mt8183-disp-dither
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v4 3/6] dt-bindings: display: mediatek: ccorr: Add support for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
2026-03-24 12:51 ` [PATCH v4 1/6] dt-bindings: display: mediatek: gamma: Add support " Jay Liu
2026-03-24 12:51 ` [PATCH v4 2/6] dt-bindings: display: mediatek: dither: " Jay Liu
@ 2026-03-24 12:52 ` Jay Liu
2026-03-24 12:52 ` [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: " Jay Liu
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, Krzysztof Kozlowski
Add a compatible string for the CCORR IP found in the MT8196 SoC.
Each CCORR IP of this SoC is fully compatible with the ones found
in MT8192.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index fca8e7bb0cbc..581003aa9b9c 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,6 +32,7 @@ properties:
- mediatek,mt8186-disp-ccorr
- mediatek,mt8188-disp-ccorr
- mediatek,mt8195-disp-ccorr
+ - mediatek,mt8196-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
reg:
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: Add support for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
` (2 preceding siblings ...)
2026-03-24 12:52 ` [PATCH v4 3/6] dt-bindings: display: mediatek: ccorr: " Jay Liu
@ 2026-03-24 12:52 ` Jay Liu
2026-03-25 8:18 ` Krzysztof Kozlowski
2026-03-24 12:52 ` [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component Jay Liu
` (2 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="y", Size: 1678 bytes --]
Add disp-tdshp hardware description for MediaTek MT8196 SoC
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
.../display/mediatek/mediatek,disp-tdshp.yaml | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
new file mode 100644
index 000000000000..048281a5b22f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,disp-tdshp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek display 2D sharpness processor
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+ MediaTek display 2D sharpness processor, namely TDSHP, provides a
+ operation used to adjust sharpness in display system.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8196-disp-tdshp
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ disp-tdshp@321e0000 {
+ compatible = "mediatek,mt8196-disp-tdshp";
+ reg = <0 0x321e0000 0 0x1000>;
+ clocks = <&dispsys_config_clk 107>;
+ };
+ };
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: Add support for MT8196
2026-03-24 12:52 ` [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: " Jay Liu
@ 2026-03-25 8:18 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2026-03-25 8:18 UTC (permalink / raw)
To: Jay Liu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-arm-kernel
On Tue, Mar 24, 2026 at 08:52:01PM +0800, Jay Liu wrote:
> Add disp-tdshp hardware description for MediaTek MT8196 SoC
>
> Signed-off-by: Jay Liu <jay.liu@mediatek.com>
> ---
> .../display/mediatek/mediatek,disp-tdshp.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp-tdshp.yaml
I don't see improvements.
Considering how vague your changelog is and you only implemented coding
style, not review comments, then NAK.
Implement everything I asked for.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
` (3 preceding siblings ...)
2026-03-24 12:52 ` [PATCH v4 4/6] dt-bindings: display: mediatek: disp-tdshp: " Jay Liu
@ 2026-03-24 12:52 ` Jay Liu
2026-03-28 18:43 ` kernel test robot
2026-03-24 12:52 ` [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196 Jay Liu
2026-03-25 8:17 ` [PATCH v4 0/6] porting pq compnent " Krzysztof Kozlowski
6 siblings, 1 reply; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu
Add CCORR component support for MT8196.
CCORR is a hardware module that optimizes the visual effects of
images by adjusting the color matrix, enabling features such as
night light.
The 8196 SoC has two CCORR hardware units, which must be chained
together in a fixed order in the display path to display the image
correctly. the `mtk_ccorr_ctm_set` API only utilizes one of these units.
To prevent the unused CCORR unit from inadvertently taking effect,
we need to block it in the mtk_crtc.c.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_crtc.c | 5 ++++-
drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 3 ++-
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 7 ++++---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 6 ++++--
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
5 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c
index fcb16f3f7b23..09b260a9a4ee 100644
--- a/drivers/gpu/drm/mediatek/mtk_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
@@ -872,11 +872,14 @@ static void mtk_crtc_atomic_flush(struct drm_crtc *crtc,
{
struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
int i;
+ bool ctm_set = false;
if (crtc->state->color_mgmt_changed)
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
- mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);
+ /* only set ctm once for the pipeline with two CCORR components */
+ if (!ctm_set)
+ ctm_set = mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);
}
mtk_crtc_update_config(mtk_crtc, !!mtk_crtc->event);
}
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
index 9672ea1f91a2..5cbc4b995d66 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
@@ -458,7 +458,8 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX]
[DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal },
[DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal },
[DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL },
- [DDP_COMPONENT_CCORR] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
+ [DDP_COMPONENT_CCORR0] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
+ [DDP_COMPONENT_CCORR1] = { MTK_DISP_CCORR, 1, &ddp_ccorr },
[DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
[DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color },
[DDP_COMPONENT_DITHER0] = { MTK_DISP_DITHER, 0, &ddp_dither },
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
index 3f3d43f4330d..7244b55f6732 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
@@ -77,7 +77,7 @@ struct mtk_ddp_comp_funcs {
struct drm_crtc_state *state);
void (*bgclr_in_on)(struct device *dev);
void (*bgclr_in_off)(struct device *dev);
- void (*ctm_set)(struct device *dev,
+ bool (*ctm_set)(struct device *dev,
struct drm_crtc_state *state);
struct device * (*dma_dev_get)(struct device *dev);
u32 (*get_blend_modes)(struct device *dev);
@@ -254,11 +254,12 @@ static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp)
comp->funcs->bgclr_in_off(comp->dev);
}
-static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
+static inline bool mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state)
{
if (comp->funcs && comp->funcs->ctm_set)
- comp->funcs->ctm_set(comp->dev, state);
+ return comp->funcs->ctm_set(comp->dev, state);
+ return false;
}
static inline struct device *mtk_ddp_comp_dma_dev_get(struct mtk_ddp_comp *comp)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 6d7bf4afa78d..ac59d81dbb26 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -80,7 +80,7 @@ void mtk_ccorr_stop(struct device *dev)
writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
}
-void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
+bool mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
{
struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
struct drm_property_blob *blob = state->ctm;
@@ -92,7 +92,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
u32 matrix_bits = ccorr->data->matrix_bits;
if (!blob)
- return;
+ return false;
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
@@ -110,6 +110,8 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3);
mtk_ddp_write(cmdq_pkt, coeffs[8] << 16,
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4);
+
+ return true;
}
static int mtk_disp_ccorr_bind(struct device *dev, struct device *master,
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 679d413bf10b..4203c28c38ce 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -22,7 +22,7 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state);
void mtk_aal_start(struct device *dev);
void mtk_aal_stop(struct device *dev);
-void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state);
+bool mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state);
int mtk_ccorr_clk_enable(struct device *dev);
void mtk_ccorr_clk_disable(struct device *dev);
void mtk_ccorr_config(struct device *dev, unsigned int w,
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component
2026-03-24 12:52 ` [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component Jay Liu
@ 2026-03-28 18:43 ` kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2026-03-28 18:43 UTC (permalink / raw)
To: Jay Liu, Chun-Kuang Hu, Philipp Zabel, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: oe-kbuild-all, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-arm-kernel, Jay Liu
Hi Jay,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next pza/reset/next linus/master v7.0-rc5 next-20260327]
[cannot apply to pza/imx-drm/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jay-Liu/dt-bindings-display-mediatek-gamma-Add-support-for-MT8196/20260328-083359
base: https://gitlab.freedesktop.org/drm/misc/kernel.git drm-misc-next
patch link: https://lore.kernel.org/r/20260324125315.4715-6-jay.liu%40mediatek.com
patch subject: [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component
config: arm64-defconfig (https://download.01.org/0day-ci/archive/20260329/202603290249.ZJ6ioqey-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260329/202603290249.ZJ6ioqey-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603290249.ZJ6ioqey-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/mediatek/mtk_ddp_comp.c:461:10: error: 'DDP_COMPONENT_CCORR0' undeclared here (not in a function); did you mean 'DDP_COMPONENT_CCORR'?
461 | [DDP_COMPONENT_CCORR0] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
| ^~~~~~~~~~~~~~~~~~~~
| DDP_COMPONENT_CCORR
>> drivers/gpu/drm/mediatek/mtk_ddp_comp.c:461:10: error: array index in initializer not of integer type
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:461:10: note: (near initialization for 'mtk_ddp_matches')
>> drivers/gpu/drm/mediatek/mtk_ddp_comp.c:462:10: error: 'DDP_COMPONENT_CCORR1' undeclared here (not in a function); did you mean 'DDP_COMPONENT_CCORR'?
462 | [DDP_COMPONENT_CCORR1] = { MTK_DISP_CCORR, 1, &ddp_ccorr },
| ^~~~~~~~~~~~~~~~~~~~
| DDP_COMPONENT_CCORR
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:462:10: error: array index in initializer not of integer type
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:462:10: note: (near initialization for 'mtk_ddp_matches')
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:463:43: warning: initialized field overwritten [-Woverride-init]
463 | [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
| ^
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:463:43: note: (near initialization for 'mtk_ddp_matches[4]')
vim +461 drivers/gpu/drm/mediatek/mtk_ddp_comp.c
456
457 static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX] = {
458 [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal },
459 [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal },
460 [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL },
> 461 [DDP_COMPONENT_CCORR0] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
> 462 [DDP_COMPONENT_CCORR1] = { MTK_DISP_CCORR, 1, &ddp_ccorr },
463 [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
464 [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color },
465 [DDP_COMPONENT_DITHER0] = { MTK_DISP_DITHER, 0, &ddp_dither },
466 [DDP_COMPONENT_DP_INTF0] = { MTK_DP_INTF, 0, &ddp_dpi },
467 [DDP_COMPONENT_DP_INTF1] = { MTK_DP_INTF, 1, &ddp_dpi },
468 [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, &ddp_dpi },
469 [DDP_COMPONENT_DPI1] = { MTK_DPI, 1, &ddp_dpi },
470 [DDP_COMPONENT_DRM_OVL_ADAPTOR] = { MTK_DISP_OVL_ADAPTOR, 0, &ddp_ovl_adaptor },
471 [DDP_COMPONENT_DSC0] = { MTK_DISP_DSC, 0, &ddp_dsc },
472 [DDP_COMPONENT_DSC1] = { MTK_DISP_DSC, 1, &ddp_dsc },
473 [DDP_COMPONENT_DSI0] = { MTK_DSI, 0, &ddp_dsi },
474 [DDP_COMPONENT_DSI1] = { MTK_DSI, 1, &ddp_dsi },
475 [DDP_COMPONENT_DSI2] = { MTK_DSI, 2, &ddp_dsi },
476 [DDP_COMPONENT_DSI3] = { MTK_DSI, 3, &ddp_dsi },
477 [DDP_COMPONENT_GAMMA] = { MTK_DISP_GAMMA, 0, &ddp_gamma },
478 [DDP_COMPONENT_MERGE0] = { MTK_DISP_MERGE, 0, &ddp_merge },
479 [DDP_COMPONENT_MERGE1] = { MTK_DISP_MERGE, 1, &ddp_merge },
480 [DDP_COMPONENT_MERGE2] = { MTK_DISP_MERGE, 2, &ddp_merge },
481 [DDP_COMPONENT_MERGE3] = { MTK_DISP_MERGE, 3, &ddp_merge },
482 [DDP_COMPONENT_MERGE4] = { MTK_DISP_MERGE, 4, &ddp_merge },
483 [DDP_COMPONENT_MERGE5] = { MTK_DISP_MERGE, 5, &ddp_merge },
484 [DDP_COMPONENT_OD0] = { MTK_DISP_OD, 0, &ddp_od },
485 [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od },
486 [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, &ddp_ovl },
487 [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, &ddp_ovl },
488 [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, &ddp_ovl },
489 [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, &ddp_ovl },
490 [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, &ddp_ovl },
491 [DDP_COMPONENT_POSTMASK0] = { MTK_DISP_POSTMASK, 0, &ddp_postmask },
492 [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL },
493 [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL },
494 [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL },
495 [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, &ddp_rdma },
496 [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, &ddp_rdma },
497 [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, &ddp_rdma },
498 [DDP_COMPONENT_RDMA4] = { MTK_DISP_RDMA, 4, &ddp_rdma },
499 [DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, &ddp_ufoe },
500 [DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL },
501 [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
502 };
503
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
` (4 preceding siblings ...)
2026-03-24 12:52 ` [PATCH v4 5/6] drm/mediatek: Support multiple CCORR component Jay Liu
@ 2026-03-24 12:52 ` Jay Liu
2026-03-28 20:08 ` kernel test robot
2026-03-25 8:17 ` [PATCH v4 0/6] porting pq compnent " Krzysztof Kozlowski
6 siblings, 1 reply; 12+ messages in thread
From: Jay Liu @ 2026-03-24 12:52 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, devicetree, linux-kernel,
linux-arm-kernel, Jay Liu, CK Hu
Add TDSHP component support for MT8196.
TDSHP is a hardware module designed to enhance the sharpness and
clarity of displayed images by analyzing and improving edges and
fine details in frames.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 49 +++++++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
3 files changed, 52 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
index 5cbc4b995d66..bd2b288938bf 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
@@ -57,6 +57,14 @@
#define POSTMASK_RELAY_MODE BIT(0)
#define DISP_REG_POSTMASK_SIZE 0x0030
+#define DISP_REG_TDSHP_CTRL 0x0100
+#define DISP_TDSHP_CTRL_EN BIT(0)
+#define DISP_REG_TDSHP_CFG 0x0110
+#define DISP_TDSHP_RELAY_MODE BIT(0)
+#define DISP_REG_TDSHP_INPUT_SIZE 0x0120
+#define DISP_REG_TDSHP_OUTPUT_OFFSET 0x0124
+#define DISP_REG_TDSHP_OUTPUT_SIZE 0x0128
+
#define DISP_REG_UFO_START 0x0000
#define UFO_BYPASS BIT(2)
@@ -261,6 +269,37 @@ static void mtk_postmask_stop(struct device *dev)
writel_relaxed(0x0, priv->regs + DISP_REG_POSTMASK_EN);
}
+static void mtk_disp_tdshp_config(struct device *dev, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
+ DISP_REG_TDSHP_INPUT_SIZE);
+ mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
+ DISP_REG_TDSHP_OUTPUT_SIZE);
+ mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs,
+ DISP_REG_TDSHP_OUTPUT_OFFSET);
+
+ mtk_ddp_write(cmdq_pkt, DISP_TDSHP_RELAY_MODE, &priv->cmdq_reg,
+ priv->regs, DISP_REG_TDSHP_CFG);
+}
+
+static void mtk_disp_tdshp_start(struct device *dev)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ writel(DISP_TDSHP_CTRL_EN, priv->regs + DISP_REG_TDSHP_CTRL);
+}
+
+static void mtk_disp_tdshp_stop(struct device *dev)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ writel(0, priv->regs + DISP_REG_TDSHP_CTRL);
+}
+
static void mtk_ufoe_start(struct device *dev)
{
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
@@ -268,6 +307,14 @@ static void mtk_ufoe_start(struct device *dev)
writel(UFO_BYPASS, priv->regs + DISP_REG_UFO_START);
}
+static const struct mtk_ddp_comp_funcs ddp_tdshp = {
+ .clk_enable = mtk_ddp_clk_enable,
+ .clk_disable = mtk_ddp_clk_disable,
+ .config = mtk_disp_tdshp_config,
+ .start = mtk_disp_tdshp_start,
+ .stop = mtk_disp_tdshp_stop,
+};
+
static const struct mtk_ddp_comp_funcs ddp_aal = {
.clk_enable = mtk_aal_clk_enable,
.clk_disable = mtk_aal_clk_disable,
@@ -441,6 +488,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
[MTK_DISP_POSTMASK] = "postmask",
[MTK_DISP_PWM] = "pwm",
[MTK_DISP_RDMA] = "rdma",
+ [MTK_DISP_TDSHP] = "tdshp",
[MTK_DISP_UFOE] = "ufoe",
[MTK_DISP_WDMA] = "wdma",
[MTK_DP_INTF] = "dp-intf",
@@ -496,6 +544,7 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX]
[DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, &ddp_rdma },
[DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, &ddp_rdma },
[DDP_COMPONENT_RDMA4] = { MTK_DISP_RDMA, 4, &ddp_rdma },
+ [DDP_COMPONENT_TDSHP0] = { MTK_DISP_TDSHP, 0, &ddp_tdshp },
[DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, &ddp_ufoe },
[DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL },
[DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
index 7244b55f6732..cf79b6f689d0 100644
--- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
@@ -38,6 +38,7 @@ enum mtk_ddp_comp_type {
MTK_DISP_POSTMASK,
MTK_DISP_PWM,
MTK_DISP_RDMA,
+ MTK_DISP_TDSHP,
MTK_DISP_UFOE,
MTK_DISP_WDMA,
MTK_DPI,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 6f6db2e1980e..3dd7d4bb7e41 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -789,6 +789,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DISP_RDMA },
{ .compatible = "mediatek,mt8195-disp-rdma",
.data = (void *)MTK_DISP_RDMA },
+ { .compatible = "mediatek,mt8196-disp-tdshp",
+ .data = (void *)MTK_DISP_TDSHP },
{ .compatible = "mediatek,mt8173-disp-ufoe",
.data = (void *)MTK_DISP_UFOE },
{ .compatible = "mediatek,mt8173-disp-wdma",
--
2.46.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196
2026-03-24 12:52 ` [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196 Jay Liu
@ 2026-03-28 20:08 ` kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2026-03-28 20:08 UTC (permalink / raw)
To: Jay Liu, Chun-Kuang Hu, Philipp Zabel, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: oe-kbuild-all, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-arm-kernel, Jay Liu, CK Hu
Hi Jay,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next pza/reset/next linus/master v7.0-rc5 next-20260327]
[cannot apply to pza/imx-drm/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jay-Liu/dt-bindings-display-mediatek-gamma-Add-support-for-MT8196/20260328-083359
base: https://gitlab.freedesktop.org/drm/misc/kernel.git drm-misc-next
patch link: https://lore.kernel.org/r/20260324125315.4715-7-jay.liu%40mediatek.com
patch subject: [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196
config: arm64-defconfig (https://download.01.org/0day-ci/archive/20260329/202603290406.4CTuDfmw-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260329/202603290406.4CTuDfmw-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202603290406.4CTuDfmw-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:509:10: error: 'DDP_COMPONENT_CCORR0' undeclared here (not in a function); did you mean 'DDP_COMPONENT_CCORR'?
509 | [DDP_COMPONENT_CCORR0] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
| ^~~~~~~~~~~~~~~~~~~~
| DDP_COMPONENT_CCORR
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:509:10: error: array index in initializer not of integer type
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:509:10: note: (near initialization for 'mtk_ddp_matches')
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:510:10: error: 'DDP_COMPONENT_CCORR1' undeclared here (not in a function); did you mean 'DDP_COMPONENT_CCORR'?
510 | [DDP_COMPONENT_CCORR1] = { MTK_DISP_CCORR, 1, &ddp_ccorr },
| ^~~~~~~~~~~~~~~~~~~~
| DDP_COMPONENT_CCORR
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:510:10: error: array index in initializer not of integer type
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:510:10: note: (near initialization for 'mtk_ddp_matches')
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:511:43: warning: initialized field overwritten [-Woverride-init]
511 | [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
| ^
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:511:43: note: (near initialization for 'mtk_ddp_matches[4]')
>> drivers/gpu/drm/mediatek/mtk_ddp_comp.c:547:10: error: 'DDP_COMPONENT_TDSHP0' undeclared here (not in a function); did you mean 'DDP_COMPONENT_DSI0'?
547 | [DDP_COMPONENT_TDSHP0] = { MTK_DISP_TDSHP, 0, &ddp_tdshp },
| ^~~~~~~~~~~~~~~~~~~~
| DDP_COMPONENT_DSI0
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:547:10: error: array index in initializer not of integer type
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:547:10: note: (near initialization for 'mtk_ddp_matches')
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:548:43: warning: initialized field overwritten [-Woverride-init]
548 | [DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, &ddp_ufoe },
| ^
drivers/gpu/drm/mediatek/mtk_ddp_comp.c:548:43: note: (near initialization for 'mtk_ddp_matches[57]')
vim +547 drivers/gpu/drm/mediatek/mtk_ddp_comp.c
504
505 static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX] = {
506 [DDP_COMPONENT_AAL0] = { MTK_DISP_AAL, 0, &ddp_aal },
507 [DDP_COMPONENT_AAL1] = { MTK_DISP_AAL, 1, &ddp_aal },
508 [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL },
509 [DDP_COMPONENT_CCORR0] = { MTK_DISP_CCORR, 0, &ddp_ccorr },
> 510 [DDP_COMPONENT_CCORR1] = { MTK_DISP_CCORR, 1, &ddp_ccorr },
511 [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
512 [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color },
513 [DDP_COMPONENT_DITHER0] = { MTK_DISP_DITHER, 0, &ddp_dither },
514 [DDP_COMPONENT_DP_INTF0] = { MTK_DP_INTF, 0, &ddp_dpi },
515 [DDP_COMPONENT_DP_INTF1] = { MTK_DP_INTF, 1, &ddp_dpi },
516 [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, &ddp_dpi },
517 [DDP_COMPONENT_DPI1] = { MTK_DPI, 1, &ddp_dpi },
518 [DDP_COMPONENT_DRM_OVL_ADAPTOR] = { MTK_DISP_OVL_ADAPTOR, 0, &ddp_ovl_adaptor },
519 [DDP_COMPONENT_DSC0] = { MTK_DISP_DSC, 0, &ddp_dsc },
520 [DDP_COMPONENT_DSC1] = { MTK_DISP_DSC, 1, &ddp_dsc },
521 [DDP_COMPONENT_DSI0] = { MTK_DSI, 0, &ddp_dsi },
522 [DDP_COMPONENT_DSI1] = { MTK_DSI, 1, &ddp_dsi },
523 [DDP_COMPONENT_DSI2] = { MTK_DSI, 2, &ddp_dsi },
524 [DDP_COMPONENT_DSI3] = { MTK_DSI, 3, &ddp_dsi },
525 [DDP_COMPONENT_GAMMA] = { MTK_DISP_GAMMA, 0, &ddp_gamma },
526 [DDP_COMPONENT_MERGE0] = { MTK_DISP_MERGE, 0, &ddp_merge },
527 [DDP_COMPONENT_MERGE1] = { MTK_DISP_MERGE, 1, &ddp_merge },
528 [DDP_COMPONENT_MERGE2] = { MTK_DISP_MERGE, 2, &ddp_merge },
529 [DDP_COMPONENT_MERGE3] = { MTK_DISP_MERGE, 3, &ddp_merge },
530 [DDP_COMPONENT_MERGE4] = { MTK_DISP_MERGE, 4, &ddp_merge },
531 [DDP_COMPONENT_MERGE5] = { MTK_DISP_MERGE, 5, &ddp_merge },
532 [DDP_COMPONENT_OD0] = { MTK_DISP_OD, 0, &ddp_od },
533 [DDP_COMPONENT_OD1] = { MTK_DISP_OD, 1, &ddp_od },
534 [DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, &ddp_ovl },
535 [DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, &ddp_ovl },
536 [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L, 0, &ddp_ovl },
537 [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L, 1, &ddp_ovl },
538 [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L, 2, &ddp_ovl },
539 [DDP_COMPONENT_POSTMASK0] = { MTK_DISP_POSTMASK, 0, &ddp_postmask },
540 [DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL },
541 [DDP_COMPONENT_PWM1] = { MTK_DISP_PWM, 1, NULL },
542 [DDP_COMPONENT_PWM2] = { MTK_DISP_PWM, 2, NULL },
543 [DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, &ddp_rdma },
544 [DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, &ddp_rdma },
545 [DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, &ddp_rdma },
546 [DDP_COMPONENT_RDMA4] = { MTK_DISP_RDMA, 4, &ddp_rdma },
> 547 [DDP_COMPONENT_TDSHP0] = { MTK_DISP_TDSHP, 0, &ddp_tdshp },
548 [DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, &ddp_ufoe },
549 [DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL },
550 [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
551 };
552
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 0/6] porting pq compnent for MT8196
2026-03-24 12:51 [PATCH v4 0/6] porting pq compnent for MT8196 Jay Liu
` (5 preceding siblings ...)
2026-03-24 12:52 ` [PATCH v4 6/6] drm/mediatek: Add TDSHP component support for MT8196 Jay Liu
@ 2026-03-25 8:17 ` Krzysztof Kozlowski
2026-03-25 13:26 ` Jay Liu (刘博)
6 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2026-03-25 8:17 UTC (permalink / raw)
To: Jay Liu
Cc: Chun-Kuang Hu, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-arm-kernel
On Tue, Mar 24, 2026 at 08:51:57PM +0800, Jay Liu wrote:
> Change in v4:
> - Address coding style comments for disp-tdshp binding.
Coding style? Why so vague? So does that mean you ignored all important
changes but did the "style" things?
> - Rebase ccorr driver patch on top of latest linux-next to fix conficts.
Where is the rest of the changeglog?
Why aren't you using b4 to provide also lore links and solve above
problem?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v4 0/6] porting pq compnent for MT8196
2026-03-25 8:17 ` [PATCH v4 0/6] porting pq compnent " Krzysztof Kozlowski
@ 2026-03-25 13:26 ` Jay Liu (刘博)
0 siblings, 0 replies; 12+ messages in thread
From: Jay Liu (刘博) @ 2026-03-25 13:26 UTC (permalink / raw)
To: krzk@kernel.org
Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
chunkuang.hu@kernel.org, devicetree@vger.kernel.org,
tzimmermann@suse.de, simona@ffwll.ch, mripard@kernel.org,
p.zabel@pengutronix.de, maarten.lankhorst@linux.intel.com,
conor+dt@kernel.org, robh@kernel.org,
dri-devel@lists.freedesktop.org, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com,
krzk+dt@kernel.org, AngeloGioacchino Del Regno
On Wed, 2026-03-25 at 09:17 +0100, Krzysztof Kozlowski wrote:
> On Tue, Mar 24, 2026 at 08:51:57PM +0800, Jay Liu wrote:
> > Change in v4:
> > - Address coding style comments for disp-tdshp binding.
>
> Coding style? Why so vague? So does that mean you ignored all
> important
> changes but did the "style" things?
>
> > - Rebase ccorr driver patch on top of latest linux-next to fix
> > conficts.
>
> Where is the rest of the changeglog?
>
> Why aren't you using b4 to provide also lore links and solve above
> problem?
>
> Best regards,
> Krzysztof
>
Dear Krzysztof,
I sincerely apologize for the confusion caused by my vague changelog.
My intention was to be concise, but I realize it made it look like I
ignored your technical feedback, which was not the case.
I have actually implemented the changes you requested in v3. Here is
the detailed breakdown of what was fixed in v4:
1. Sibling description: Removed as suggested.
2. Enum: Dropped the items list and used enum directly.
3. Formatting: Removed the extra blank line and fixed the indentation
in the example section.
Regarding the Node Name (disp-tdshp):
This was the only item I hesitated to change. "tdshp" stands for "2D
sharpness", and I kept it to align with MediaTek's internal naming.
However, I understand the upstream requirement for generic names. Since
this is a sharpness engine, would you prefer "sharpness-processor" or
something similar?
And Thank you for the recommendation regarding b4. I will set it up for
future submissions to ensure lore links and changelogs are generated
correctly.
I will send a v5 with a proper changelog and the node name update once
we agree on the name.
Please let me know if I missed any other comments or if you have
further suggestions. I will do my best to address them.
Best regards,
Jay
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