[PATCH 0/7] soc: sunxi: sram: Add H616 SRAM support

[PATCH 0/7] soc: sunxi: sram: Add H616 SRAM support

[Chen-Yu Tsai]

Hi,

The Allwinner H616 has two switchable peripheral SRAM regions:

- The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
  to this region is enabled by default. CPU access can be disabled,
  after which reads will show the same stale value for all addresses,
  while writes are ignored.

  The mux value for this region is different from previous generations.

- The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
  KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
  CPU access is disabled, the whole region reads as zero, while writes
  are ignored.

  The mux value for this region is the same as on the A64 and H6.

The driver needs to allow both the Video Engine and Display Engine to
claim the SRAM C region at the same time.

At the same time, since the Video Engine needs to claim both SRAM
regions, the Allwinner SRAM consumer interface needs to support claiming
multiple regions for one consumer.


Patch 1 adds a compatible for the new H616 VE SRAM to the common SRAM
binding.

Patch 2 adds a compatible for the new H616 VE SRAM to the Allwinner SRAM
binding.

Patch 3 is a minor cleanup that const-ifies the SRAM related hardware
description data in the driver.

Patch 4 implements support for multiple hardware block drivers to claim
the same SRAM region.

Patch 5 implements support for one consumer to claim multiple SRAM
regions.

Patch 6 adds support for the H616 VE SRAM region to the SRAM driver.

Patch 7 adds the SRAM regions to the H616 dtsi file. This was picked
from Jernej's tree and split into one patch for SRAM and one patch for
the video engine.


I think all the changes can go through the sunxi tree, unless the device
tree maintainers want to take the first patch separately?

The new users of this, support for the H616 video engine, will be sent
separately.


Thanks
ChenYu


Chen-Yu Tsai (6):
  dt-bindings: sram: Document Allwinner H616 VE SRAM
  dt-bindings: sram: sunxi-sram: Add H616 SRAM regions
  soc: sunxi: sram: Const-ify sunxi_sram_func data and references
  soc: sunxi: sram: Allow SRAM to be claimed multiple times
  soc: sunxi: sram: Support claiming multiple regions per device
  soc: sunxi: sram: Add H616 SRAM regions

Jernej Skrabec (1):
  arm64: dts: allwinner: sun50i-h616: Add SRAM nodes

 .../allwinner,sun4i-a10-system-control.yaml   |   5 +-
 .../devicetree/bindings/sram/sram.yaml        |   1 +
 .../arm64/boot/dts/allwinner/sun50i-h616.dtsi |  28 ++-
 drivers/soc/sunxi/sunxi_sram.c                | 196 +++++++++++-------
 4 files changed, 151 insertions(+), 79 deletions(-)

-- 
2.47.3

[PATCH 1/7] dt-bindings: sram: Document Allwinner H616 VE SRAM

[Chen-Yu Tsai]

The Allwinner H616 has two switchable peripheral SRAM regions:

- The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
  to this region is enabled by default. CPU access can be disabled,
  after which reads will show the same stale value for all addresses,
  while writes are ignored.

  The mux value for this region is different from previous generations,
  and thus needs a completely new compatible.

- The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
  KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
  CPU access is disabled, the whole region reads as zero, while writes
  are ignored.

  The mux value for this region is the same as on the A64 and H6. The
  existing compatible for the A64 already covers this.

Add the compatible for the VE SRAM to the list of covered compatibles in
the generic SRAM region binding.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 Documentation/devicetree/bindings/sram/sram.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index c451140962c8..ddaab84f7ba0 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -81,6 +81,7 @@ patternProperties:
             - allwinner,sun4i-a10-sram-d
             - allwinner,sun9i-a80-smp-sram
             - allwinner,sun50i-a64-sram-c
+            - allwinner,sun50i-h616-ve-sram
             - amlogic,meson8-ao-arc-sram
             - amlogic,meson8b-ao-arc-sram
             - amlogic,meson8-smp-sram
-- 
2.47.3

Re: [PATCH 1/7] dt-bindings: sram: Document Allwinner H616 VE SRAM

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:49 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> The Allwinner H616 has two switchable peripheral SRAM regions:
> 
> - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
>   to this region is enabled by default. CPU access can be disabled,
>   after which reads will show the same stale value for all addresses,
>   while writes are ignored.
> 
>   The mux value for this region is different from previous generations,
>   and thus needs a completely new compatible.
> 
> - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
>   KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
>   CPU access is disabled, the whole region reads as zero, while writes
>   are ignored.
> 
>   The mux value for this region is the same as on the A64 and H6. The
>   existing compatible for the A64 already covers this.
> 
> Add the compatible for the VE SRAM to the list of covered compatibles in
> the generic SRAM region binding.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 2/7] dt-bindings: sram: sunxi-sram: Add H616 SRAM regions

[Chen-Yu Tsai]

The Allwinner H616 has two switchable peripheral SRAM regions:

- The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
  to this region is enabled by default. CPU access can be disabled,
  after which reads will show the same stale value for all addresses,
  while writes are ignored.

  The mux value for this region is different from previous generations.

- The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
  KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
  CPU access is disabled, the whole region reads as zero, while writes
  are ignored.

  The mux value for this region is the same as on the A64 and H6.

Add compatible strings for both of them.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 .../bindings/sram/allwinner,sun4i-a10-system-control.yaml    | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
index e7f7cf72719e..6e6ab2168a2a 100644
--- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
+++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
@@ -80,6 +80,7 @@ patternProperties:
               - const: allwinner,sun4i-a10-sram-c1
               - const: allwinner,sun4i-a10-sram-d
               - const: allwinner,sun50i-a64-sram-c
+              - const: allwinner,sun50i-h616-ve-sram
               - items:
                   - enum:
                       - allwinner,sun5i-a13-sram-a3-a4
@@ -103,7 +104,9 @@ patternProperties:
                       - allwinner,sun7i-a20-sram-d
                   - const: allwinner,sun4i-a10-sram-d
               - items:
-                  - const: allwinner,sun50i-h6-sram-c
+                  - enum:
+                      - allwinner,sun50i-h6-sram-c
+                      - allwinner,sun50i-h616-sram-c
                   - const: allwinner,sun50i-a64-sram-c
 
 required:
-- 
2.47.3

Re: [PATCH 2/7] dt-bindings: sram: sunxi-sram: Add H616 SRAM regions

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:50 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> The Allwinner H616 has two switchable peripheral SRAM regions:
> 
> - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
>   to this region is enabled by default. CPU access can be disabled,
>   after which reads will show the same stale value for all addresses,
>   while writes are ignored.
> 
>   The mux value for this region is different from previous generations.
> 
> - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
>   KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
>   CPU access is disabled, the whole region reads as zero, while writes
>   are ignored.
> 
>   The mux value for this region is the same as on the A64 and H6.
> 
> Add compatible strings for both of them.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 3/7] soc: sunxi: sram: Const-ify sunxi_sram_func data and references

[Chen-Yu Tsai]

sunxi_sram_func contains value mapping that do not change at runtime.

Const-ify them.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 drivers/soc/sunxi/sunxi_sram.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index 446b9fc1f175..5e8c80ae3509 100644
--- a/drivers/soc/sunxi/sunxi_sram.c
+++ b/drivers/soc/sunxi/sunxi_sram.c
@@ -29,11 +29,11 @@ struct sunxi_sram_func {
 };
 
 struct sunxi_sram_data {
-	char			*name;
-	u8			reg;
-	u8			offset;
-	u8			width;
-	struct sunxi_sram_func	*func;
+	char				*name;
+	u8				reg;
+	u8				offset;
+	u8				width;
+	const struct sunxi_sram_func	*func;
 };
 
 struct sunxi_sram_desc {
@@ -54,7 +54,7 @@ struct sunxi_sram_desc {
 		.reg = _reg,					\
 		.offset = _off,					\
 		.width = _width,				\
-		.func = (struct sunxi_sram_func[]){		\
+		.func = (const struct sunxi_sram_func[]){	\
 			__VA_ARGS__, { } },			\
 	}
 
@@ -111,7 +111,7 @@ static int sunxi_sram_show(struct seq_file *s, void *data)
 	struct device_node *sram_node, *section_node;
 	const struct sunxi_sram_data *sram_data;
 	const struct of_device_id *match;
-	struct sunxi_sram_func *func;
+	const struct sunxi_sram_func *func;
 	const __be32 *sram_addr_p, *section_addr_p;
 	u32 val;
 
@@ -169,7 +169,7 @@ static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *nod
 {
 	const struct of_device_id *match;
 	const struct sunxi_sram_data *data;
-	struct sunxi_sram_func *func;
+	const struct sunxi_sram_func *func;
 	struct of_phandle_args args;
 	u8 val;
 	int ret;
-- 
2.47.3

Re: [PATCH 3/7] soc: sunxi: sram: Const-ify sunxi_sram_func data and references

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:51 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> sunxi_sram_func contains value mapping that do not change at runtime.
> 
> Const-ify them.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 4/7] soc: sunxi: sram: Allow SRAM to be claimed multiple times

[Chen-Yu Tsai]

On the H616, the SRAM C region is an alias mapping to part of the VE
SRAM (accessible in whole at a different address) and part of the DE
SRAM (otherwise unaccessible). As such both the VE and DE need to claim
this SRAM region to prevent access from the CPU.

The SRAM claim API is designed so that a "claim" routes the SRAM to the
peripheral device, disabling access from the CPU. So long as the written
register value is the same for all the claimants involved, allowing
multiple or repeated claims is trivial. This is indeed the case for all
supported SRAM regions. The only known SRAM region to have multiple
different settings is the SRAM C2 region; this can be claimed by the AE,
CE, or ACE (assumed to be AE + CE). This region is not supported, and
likely will never be needed nor supported, as there is no documentation
for the peripherals involved.

Change the SRAM region "claimed" field from a boolean to a reference
count. A claim will increment the count, while a release decreases it.
The first claim will trigger the register value write. The driver
otherwise behaves as before.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 drivers/soc/sunxi/sunxi_sram.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index 5e8c80ae3509..aba155379ccc 100644
--- a/drivers/soc/sunxi/sunxi_sram.c
+++ b/drivers/soc/sunxi/sunxi_sram.c
@@ -12,6 +12,7 @@
 
 #include <linux/debugfs.h>
 #include <linux/io.h>
+#include <linux/limits.h>
 #include <linux/mfd/syscon.h>
 #include <linux/module.h>
 #include <linux/of.h>
@@ -38,7 +39,7 @@ struct sunxi_sram_data {
 
 struct sunxi_sram_desc {
 	struct sunxi_sram_data	data;
-	bool			claimed;
+	u8			claim_cnt;
 };
 
 #define SUNXI_SRAM_MAP(_reg_val, _val, _func)			\
@@ -244,9 +245,11 @@ int sunxi_sram_claim(struct device *dev)
 
 	spin_lock(&sram_lock);
 
-	if (sram_desc->claimed) {
+	if (sram_desc->claim_cnt) {
+		if (!WARN_ON(sram_desc->claim_cnt == U8_MAX))
+			sram_desc->claim_cnt++;
 		spin_unlock(&sram_lock);
-		return -EBUSY;
+		return 0;
 	}
 
 	mask = GENMASK(sram_data->offset + sram_data->width - 1,
@@ -256,7 +259,7 @@ int sunxi_sram_claim(struct device *dev)
 	writel(val | ((device << sram_data->offset) & mask),
 	       base + sram_data->reg);
 
-	sram_desc->claimed = true;
+	sram_desc->claim_cnt++;
 	spin_unlock(&sram_lock);
 
 	return 0;
@@ -278,7 +281,8 @@ void sunxi_sram_release(struct device *dev)
 	sram_desc = to_sram_desc(sram_data);
 
 	spin_lock(&sram_lock);
-	sram_desc->claimed = false;
+	if (!WARN_ON(sram_desc->claim_cnt == 0))
+		sram_desc->claim_cnt--;
 	spin_unlock(&sram_lock);
 }
 EXPORT_SYMBOL(sunxi_sram_release);
-- 
2.47.3

Re: [PATCH 4/7] soc: sunxi: sram: Allow SRAM to be claimed multiple times

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:52 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> On the H616, the SRAM C region is an alias mapping to part of the VE
> SRAM (accessible in whole at a different address) and part of the DE
> SRAM (otherwise unaccessible). As such both the VE and DE need to claim
> this SRAM region to prevent access from the CPU.
> 
> The SRAM claim API is designed so that a "claim" routes the SRAM to the
> peripheral device, disabling access from the CPU. So long as the written
> register value is the same for all the claimants involved, allowing
> multiple or repeated claims is trivial. This is indeed the case for all
> supported SRAM regions. The only known SRAM region to have multiple
> different settings is the SRAM C2 region; this can be claimed by the AE,
> CE, or ACE (assumed to be AE + CE). This region is not supported, and
> likely will never be needed nor supported, as there is no documentation
> for the peripherals involved.
> 
> Change the SRAM region "claimed" field from a boolean to a reference
> count. A claim will increment the count, while a release decreases it.
> The first claim will trigger the register value write. The driver
> otherwise behaves as before.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 5/7] soc: sunxi: sram: Support claiming multiple regions per device

[Chen-Yu Tsai]

On the H616, the video engine needs to claim two SRAM regions.

Support claiming multiple regions per device.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 drivers/soc/sunxi/sunxi_sram.c | 164 +++++++++++++++++++--------------
 1 file changed, 96 insertions(+), 68 deletions(-)

diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index aba155379ccc..4d81897179e7 100644
--- a/drivers/soc/sunxi/sunxi_sram.c
+++ b/drivers/soc/sunxi/sunxi_sram.c
@@ -165,79 +165,48 @@ static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data
 	return container_of(data, struct sunxi_sram_desc, data);
 }
 
-static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
-							 unsigned int *reg_value)
+static const struct sunxi_sram_data *sunxi_sram_get_match(struct device_node *np, u8 val,
+							  unsigned int *reg_value)
 {
 	const struct of_device_id *match;
 	const struct sunxi_sram_data *data;
 	const struct sunxi_sram_func *func;
-	struct of_phandle_args args;
-	u8 val;
-	int ret;
-
-	ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
-					       &args);
-	if (ret)
-		return ERR_PTR(ret);
 
-	if (!of_device_is_available(args.np)) {
-		ret = -EBUSY;
-		goto err;
-	}
+	if (!of_device_is_available(np))
+		return ERR_PTR(-ENODEV);
 
-	val = args.args[0];
-
-	match = of_match_node(sunxi_sram_dt_ids, args.np);
-	if (!match) {
-		ret = -EINVAL;
-		goto err;
-	}
+	match = of_match_node(sunxi_sram_dt_ids, np);
+	if (!match)
+		return ERR_PTR(-ENODEV);
 
 	data = match->data;
-	if (!data) {
-		ret = -EINVAL;
-		goto err;
-	}
-
-	for (func = data->func; func->func; func++) {
-		if (val == func->val) {
-			if (reg_value)
-				*reg_value = func->reg_val;
+	if (!data)
+		return ERR_PTR(-EINVAL);
 
+	for (func = data->func; func->func; func++)
+		if (val == func->val)
 			break;
-		}
-	}
 
-	if (!func->func) {
-		ret = -EINVAL;
-		goto err;
-	}
+	if (!func->func)
+		return ERR_PTR(-EINVAL);
 
-	of_node_put(args.np);
-	return match->data;
+	if (reg_value)
+		*reg_value = func->reg_val;
 
-err:
-	of_node_put(args.np);
-	return ERR_PTR(ret);
+	return data;
 }
 
-int sunxi_sram_claim(struct device *dev)
+#define SUNXI_SRAM_PROP "allwinner,sram"
+#define SUNXI_SRAM_CELLS 1
+
+static int sunxi_sram_claim_one(struct device_node *np, u8 arg)
 {
 	const struct sunxi_sram_data *sram_data;
 	struct sunxi_sram_desc *sram_desc;
 	unsigned int device;
 	u32 val, mask;
 
-	if (IS_ERR(base))
-		return PTR_ERR(base);
-
-	if (!base)
-		return -EPROBE_DEFER;
-
-	if (!dev || !dev->of_node)
-		return -EINVAL;
-
-	sram_data = sunxi_sram_of_parse(dev->of_node, &device);
+	sram_data = sunxi_sram_get_match(np, arg, &device);
 	if (IS_ERR(sram_data))
 		return PTR_ERR(sram_data);
 
@@ -248,33 +217,28 @@ int sunxi_sram_claim(struct device *dev)
 	if (sram_desc->claim_cnt) {
 		if (!WARN_ON(sram_desc->claim_cnt == U8_MAX))
 			sram_desc->claim_cnt++;
-		spin_unlock(&sram_lock);
-		return 0;
+	} else {
+		mask = GENMASK(sram_data->offset + sram_data->width - 1,
+			       sram_data->offset);
+		val = readl(base + sram_data->reg);
+		val &= ~mask;
+		writel(val | ((device << sram_data->offset) & mask),
+		       base + sram_data->reg);
+
+		sram_desc->claim_cnt++;
 	}
 
-	mask = GENMASK(sram_data->offset + sram_data->width - 1,
-		       sram_data->offset);
-	val = readl(base + sram_data->reg);
-	val &= ~mask;
-	writel(val | ((device << sram_data->offset) & mask),
-	       base + sram_data->reg);
-
-	sram_desc->claim_cnt++;
 	spin_unlock(&sram_lock);
 
 	return 0;
 }
-EXPORT_SYMBOL(sunxi_sram_claim);
 
-void sunxi_sram_release(struct device *dev)
+static void sunxi_sram_release_one(struct device_node *np, u8 arg)
 {
 	const struct sunxi_sram_data *sram_data;
 	struct sunxi_sram_desc *sram_desc;
 
-	if (!dev || !dev->of_node)
-		return;
-
-	sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
+	sram_data = sunxi_sram_get_match(np, arg, NULL);
 	if (IS_ERR(sram_data))
 		return;
 
@@ -285,6 +249,70 @@ void sunxi_sram_release(struct device *dev)
 		sram_desc->claim_cnt--;
 	spin_unlock(&sram_lock);
 }
+
+int sunxi_sram_claim(struct device *dev)
+{
+	struct of_phandle_iterator it;
+	int err;
+	int count = 0;
+
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	if (!base)
+		return -EPROBE_DEFER;
+
+	if (!dev || !dev->of_node)
+		return -EINVAL;
+
+	of_for_each_phandle(&it, err, dev->of_node, SUNXI_SRAM_PROP,
+			    NULL, SUNXI_SRAM_CELLS) {
+		u32 args[SUNXI_SRAM_CELLS];
+
+		of_phandle_iterator_args(&it, args, SUNXI_SRAM_CELLS);
+
+		err = sunxi_sram_claim_one(it.node, args[0]);
+		if (err)
+			goto err;
+
+		count++;
+	}
+
+	if (count == 0)
+		return -ENOENT;
+
+	return 0;
+
+err:
+	while (count--) {
+		struct of_phandle_args args;
+
+		of_parse_phandle_with_fixed_args(dev->of_node, SUNXI_SRAM_PROP,
+						 SUNXI_SRAM_CELLS, count, &args);
+		sunxi_sram_release_one(args.np, args.args[0]);
+	}
+
+	return err;
+}
+EXPORT_SYMBOL(sunxi_sram_claim);
+
+void sunxi_sram_release(struct device *dev)
+{
+	struct of_phandle_iterator it;
+	int err;
+
+	if (!dev || !dev->of_node)
+		return;
+
+	of_for_each_phandle(&it, err, dev->of_node, SUNXI_SRAM_PROP,
+			    NULL, SUNXI_SRAM_CELLS) {
+		u32 args[SUNXI_SRAM_CELLS];
+
+		of_phandle_iterator_args(&it, args, SUNXI_SRAM_CELLS);
+
+		sunxi_sram_release_one(it.node, args[0]);
+	}
+}
 EXPORT_SYMBOL(sunxi_sram_release);
 
 struct sunxi_sramc_variant {
-- 
2.47.3

Re: [PATCH 5/7] soc: sunxi: sram: Support claiming multiple regions per device

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:53 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> On the H616, the video engine needs to claim two SRAM regions.
> 
> Support claiming multiple regions per device.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 6/7] soc: sunxi: sram: Add H616 SRAM regions

[Chen-Yu Tsai]

The Allwinner H616 has two switchable peripheral SRAM regions:

- The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
  to this region is enabled by default. CPU access can be disabled,
  after which reads will show the same stale value for all addresses,
  while writes are ignored.

  The mux value for this region is different from previous generations.

- The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
  KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
  CPU access is disabled, the whole region reads as zero, while writes
  are ignored.

  The mux value for this region is the same as on the A64 and H6.

Add data for the VE SRAM. The register values were taken from the BSP
vendor kernel.

Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 drivers/soc/sunxi/sunxi_sram.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/soc/sunxi/sunxi_sram.c b/drivers/soc/sunxi/sunxi_sram.c
index 4d81897179e7..2ccaeacf8c70 100644
--- a/drivers/soc/sunxi/sunxi_sram.c
+++ b/drivers/soc/sunxi/sunxi_sram.c
@@ -83,6 +83,12 @@ static struct sunxi_sram_desc sun50i_a64_sram_c = {
 				  SUNXI_SRAM_MAP(0, 1, "de2")),
 };
 
+static struct sunxi_sram_desc sun50i_h616_ve_sram = {
+	.data	= SUNXI_SRAM_DATA("VE", 0x0, 0, 1,
+				  SUNXI_SRAM_MAP(1, 0, "cpu"),
+				  SUNXI_SRAM_MAP(0, 1, "ve")),
+};
+
 static const struct of_device_id sunxi_sram_dt_ids[] = {
 	{
 		.compatible	= "allwinner,sun4i-a10-sram-a3-a4",
@@ -100,6 +106,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = {
 		.compatible	= "allwinner,sun50i-a64-sram-c",
 		.data		= &sun50i_a64_sram_c.data,
 	},
+	{
+		.compatible	= "allwinner,sun50i-h616-ve-sram",
+		.data		= &sun50i_h616_ve_sram.data,
+	},
 	{}
 };
 
-- 
2.47.3

Re: [PATCH 6/7] soc: sunxi: sram: Add H616 SRAM regions

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:54 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> The Allwinner H616 has two switchable peripheral SRAM regions:
> 
> - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
>   to this region is enabled by default. CPU access can be disabled,
>   after which reads will show the same stale value for all addresses,
>   while writes are ignored.
> 
>   The mux value for this region is different from previous generations.
> 
> - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
>   KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
>   CPU access is disabled, the whole region reads as zero, while writes
>   are ignored.
> 
>   The mux value for this region is the same as on the A64 and H6.
> 
> Add data for the VE SRAM. The register values were taken from the BSP
> vendor kernel.
> 
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

[PATCH 7/7] arm64: dts: allwinner: sun50i-h616: Add SRAM nodes

[Chen-Yu Tsai]

From: Jernej Skrabec <jernej.skrabec@gmail.com>

The H616 SoC has a video engine, and two SRAM regions needed by it.

Add the SRAM regions to the dtsi file. The video engine will be added
in a separate change.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
[wens@kernel.org: Add VE SRAM region, commit message, and split into two]
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
 .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 28 ++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 8d1110c14bad..0c50a73def65 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -182,12 +182,38 @@ syscon: syscon@3000000 {
 			#size-cells = <1>;
 			ranges;
 
-			sram_c: sram@28000 {
+			/* SRAM C */
+			sram@28000 {
 				compatible = "mmio-sram";
 				reg = <0x00028000 0x30000>;
 				#address-cells = <1>;
 				#size-cells = <1>;
 				ranges = <0 0x00028000 0x30000>;
+
+				/*
+				 * 0x0 ~ 0x20000 is partial alias of VE SRAM below.
+				 * 0x20000 ~ 0x2ffff is (partial?) alias of DE SRAM.
+				 * However the whole region is toggled together.
+				 */
+				sram_c: sram-section@0 {
+					compatible = "allwinner,sun50i-h616-sram-c",
+						     "allwinner,sun50i-a64-sram-c";
+					reg = <0x00000 0x30000>;
+				};
+			};
+
+			/* VE SRAM */
+			sram@1a00000 {
+				compatible = "mmio-sram";
+				reg = <0x01a00000 0x200000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x01a00000 0x200000>;
+
+				ve_sram: sram-section@0 {
+					compatible = "allwinner,sun50i-h616-ve-sram";
+					reg = <0x000000 0x200000>;
+				};
 			};
 		};
 
-- 
2.47.3

Re: [PATCH 7/7] arm64: dts: allwinner: sun50i-h616: Add SRAM nodes

[Jernej Škrabec]

Dne torek, 24. marec 2026 ob 17:43:55 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> From: Jernej Skrabec <jernej.skrabec@gmail.com>
> 
> The H616 SoC has a video engine, and two SRAM regions needed by it.
> 
> Add the SRAM regions to the dtsi file. The video engine will be added
> in a separate change.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> [wens@kernel.org: Add VE SRAM region, commit message, and split into two]
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej