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(unknown [172.20.64.188]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id D51684126F9A; Wed, 25 Mar 2026 19:21:59 +0800 (CST) From: Jun Guo To: peter.chen@cixtech.com, fugang.duan@cixtech.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com, robin.murphy@arm.com, Frank.Li@kernel.org Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com, linux-arm-kernel@lists.infradead.org, Jun Guo Subject: [PATCH v6 0/2] dma: arm-dma350: handle shared channel IRQ wiring on sky1 Date: Wed, 25 Mar 2026 19:21:57 +0800 Message-Id: <20260325112159.663881-1-jun.guo@cixtech.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PEPF000B66CE:EE_|KL1PR06MB6686:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: dda8f7b8-04d0-46ee-8fdf-08de8a60bc79 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|7416014|921020|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: GowSDUskEPt3QHP358CqH7v4xyYJ5NDxPDRmhXjDapjJi3MGSoveSgnxLQhocTNsfBbB+1zvufnqW9c2Wa46idLWroXNc4YTlo6n41fBsMD5uMTUyobQmmLCbYIp0pdTvgHoOgiBhXTK25+fQqMf8JFLLdyadmiMs8JauPGl6pkvmoXtWvKMKToq/KTm+ruPXhYhcx/3cVL44afP3A3G5PaXY2OjVdeVsFmtudCXGKc3Dsx09rAKY8c46J6fqehZ+wI0RxqlKfgsikjFONpIZJROFeod+x9pO2Wb2MZxyuvPuaqliW9w2bGpPHlpgmhk8mjQT+7KIpb3PUX8MaDZVy8lzxUpYunlswXW0KTPHc2F9il1BEiLX6ZOOim0hQjiooRTEFeHWZqdhqklVrFlg6lbUJBj5ToZank+vbbCiogO1eOFtvq2ozkpvldaGCnMGuyqckR/um9F9S/fdTlEz3hfEAEU/fCBTiCgy0xZRM3zRc5/wacFS4ihvpJRzU5q2Kd7vuyL4cLgQz1tRv6TQTTc8Pd2gZg7/0aS99wPwiiWHuwHmab4DJlfu+6otDA+lwqVouY7ruR9sGpxguQy5aP6IZlVEFvzJnmPpi5sS+IB6iEW6ZbHxCCPYkelLz+WYL7A31aBloITGUoagWGXUDUYnd86PmFO8hmmPOMHWXnmLBJpZBuX773ZFHVwAshwE4l21EBkoJupJkmj+f3TPof88aGauRceQCKGJcLCgz6qnXQJNg3BAAXpT/rjXURBtiWyr4kdV5Tfq9sJghNEG0bkM/USIRk/1bGc7TvlGWKW3OKYx6sFlrB18qfvGqjH X-Forefront-Antispam-Report: CIP:222.71.101.198;CTRY:CN;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:smtprelay.cixcomputing.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(7416014)(921020)(18002099003)(56012099003);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: cJ90qwUP/Ybfwi6qeWO8jSzJ3YSBnFjh7qSaaCOWA88He9GkdQNuScFaKh8ywgZxtW1iBZYZGCO6D8G3L/XsgWjl7Y3ucgCYFuFmsEVb4d7kZNiYOXaAAOlN9xIq0ngieVuNHhQHsdHhCZQ35dl41O1sG+cCA3Ty/7fNxzP5mO1SrVQ26pODQHCjmO7Ef3EcxofmeC1VsX1Qdm7PVd4dHTDuq+Qe4KLRBJFJDo/BUw/5UcZzTx2mp5YcLK+0dW76neXtz0+VzPEw9ESfZbW4Ayd+XGOrpSKI/XIc6rOMmcU9FQYqzK5S7K3+z4QpcQ+Cqroo8cly0/ZFGAp+QGjKgzW0R50NVq6Kleax3gIlA3P8fkj/dJSyKD7gyCGj3+skXFR/VziLgh4f/UmZN3K4Q8bh3KfCHHRXFa1IHhoksOhALAF9NNaH4AYHCYZvU4R+ X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2026 11:22:01.1818 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dda8f7b8-04d0-46ee-8fdf-08de8a60bc79 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SG2PEPF000B66CE.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: KL1PR06MB6686 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260325_042210_189366_0A49A31D X-CRM114-Status: GOOD ( 12.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series updates DMA-350 support for the SKY1 integration where all DMA channel interrupt outputs are wired to the same GIC SPI. Patch 1 enables DMANSECCTRL.INTREN_ANYCHINTR in the driver so per-channel interrupt status is propagated even when channels share one parent IRQ line. Patch 2 adds the SKY1 DMA-350 DT node and describes the channel interrupt sources using 8 channel entries, while all entries map to the same SPI. Tested on CIX SKY1 with dmatest: % echo 2000 > /sys/module/dmatest/parameters/timeout % echo 1 > /sys/module/dmatest/parameters/iterations % echo "" > /sys/module/dmatest/parameters/channel % echo 1 > /sys/module/dmatest/parameters/run Changes in v6: - Drop the dt-binding update and keep the existing 8-channel interrupt schema. - Simplify driver change to a minimal fix: enable DMANSECCTRL.INTREN_ANYCHINTR. - Update SKY1 DT node to describe 8 channel interrupt entries mapped to one SPI. Changes in v5: - Fix the formatting issue in the AI tag. - Remove the unnecessary "cix,sky1-dma-350". Changes in v4: - Reword binding text to align with kernel style. - Revise the AI attribution to the standard format. - Remove redundant links from the commit log. Changes in v3: - Rework binding compatible description to match generic-first model. - Keep interrupts schema support for both 1-IRQ and 8-IRQ topologies. - Drop SoC match-data dependency for IRQ mode selection. - Detect IRQ topology via platform_irq_count() in probe path. - Refactor IRQ handling into a shared channel handler. - Enable DMANSECCTRL.INTREN_ANYCHINTR only in combined IRQ mode. Changes in v2: - Update to kernel standards, enhance patch description, and refactor driver to use match data for hardware differentiation instead of compatible strings. Jun Guo (2): dma: arm-dma350: enable ANYCH interrupt for shared IRQ wiring arm64: dts: cix: add sky1 DMA-350 node with channel IRQ entries arch/arm64/boot/dts/cix/sky1.dtsi | 14 ++++++++++++++ drivers/dma/arm-dma350.c | 9 +++++++++ 2 files changed, 23 insertions(+) -- 2.34.1