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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4871fbca47dsm2239685e9.1.2026.03.25.13.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2026 13:23:59 -0700 (PDT) Date: Wed, 25 Mar 2026 20:23:57 +0000 From: David Laight To: Catalin Marinas Cc: Ankur Arora , Andrew Morton , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, arnd@arndb.de, will@kernel.org, peterz@infradead.org, mark.rutland@arm.com, harisokn@amazon.com, cl@gentwo.org, ast@kernel.org, rafael@kernel.org, daniel.lezcano@linaro.org, memxor@gmail.com, zhenglifeng1@huawei.com, xueshuai@linux.alibaba.com, rdunlap@infradead.org, joao.m.martins@oracle.com, boris.ostrovsky@oracle.com, konrad.wilk@oracle.com Subject: Re: [PATCH v10 00/12] barrier: Add smp_cond_load_{relaxed,acquire}_timeout() Message-ID: <20260325202357.3e203314@pumpkin> In-Reply-To: References: <20260316013651.3225328-1-ankur.a.arora@oracle.com> <20260315184925.b6f93386e918ca79614843e3@linux-foundation.org> <874imftol4.fsf@oracle.com> <20260316233712.7cbfac27@pumpkin> <87ms07rlp9.fsf@oracle.com> <20260317091705.5a64fc56@pumpkin> <20260325154210.79a621df@pumpkin> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260325_132401_764290_AE98A16C X-CRM114-Status: GOOD ( 17.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 25 Mar 2026 16:32:49 +0000 Catalin Marinas wrote: > On Wed, Mar 25, 2026 at 03:42:10PM +0000, David Laight wrote: ... > > Looking at the code I think the "sevl; wfe" pair should be higher up. > > Yes, I replied to your other message. We could move it higher indeed, > before the condition check, but I can't get my head around the ordering. > Can need_resched() check be speculated before the WFE? I need to think > some more. I don't think speculation can matter. Both SEVL and WFE must be serialised against any other instructions that can change the event flag (as well as each other) otherwise everything is broken. Apart from that it doesn't matter, what matters is the instruction boundary the interrupt happens at. Actually both SEVL and WFE may be synchronising instructions and very slow. So you may not want to put them in the fast path where the condition is true on entry (or even true after a retry). So the code might have to look like: for (;;) { VAL = mem; if (cond(VAL)) return; SEVL; WFE; if (cond(VAL)) return; v1 = LDX(mem); if (v1 == VAL) WFE; } Definitely needs a comment that both 'return from exception' and losing the exclusive access set the event flag. The asm probably ought to have a full "memory" clobber. Just in case the compiler gets lively with re-ordering. David