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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oupton@kernel.org>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Sascha Bischoff <sascha.bischoff@arm.com>,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH 02/15] KVM: arm64: Don't skip per-vcpu NV initialisation
Date: Thu, 26 Mar 2026 15:35:17 +0000	[thread overview]
Message-ID: <20260326153530.3981879-3-maz@kernel.org> (raw)
In-Reply-To: <20260326153530.3981879-1-maz@kernel.org>

Some GICv5-related rework have resulted in the NV sanitisation of
registers being skipped for secondary vcpus, which is a pretty bad
idea.

Hoist the NV init early so that it is always executed.

Fixes: cbd8c958be54a ("KVM: arm64: Return early from kvm_finalize_sys_regs() if guest has run")
Link: https://sashiko.dev/#/patchset/20260319154937.3619520-1-sascha.bischoff%40arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/sys_regs.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index e1001544d4f40..18e2d2fccedb8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -5772,6 +5772,12 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)
 
 	guard(mutex)(&kvm->arch.config_lock);
 
+	if (vcpu_has_nv(vcpu)) {
+		int ret = kvm_init_nv_sysregs(vcpu);
+		if (ret)
+			return ret;
+	}
+
 	if (kvm_vm_has_ran_once(kvm))
 		return 0;
 
@@ -5820,12 +5826,6 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)
 		kvm_vgic_finalize_idregs(kvm);
 	}
 
-	if (vcpu_has_nv(vcpu)) {
-		int ret = kvm_init_nv_sysregs(vcpu);
-		if (ret)
-			return ret;
-	}
-
 	return 0;
 }
 
-- 
2.47.3



  parent reply	other threads:[~2026-03-26 15:35 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-26 15:35 [PATCH 00/15] KVM: arm64: First batch of vgic-v5 related fixes Marc Zyngier
2026-03-26 15:35 ` [PATCH 01/15] KVM: arm64: vgic: Don't reset cpuif/redist addresses at finalize time Marc Zyngier
2026-03-26 15:35 ` Marc Zyngier [this message]
2026-03-26 15:35 ` [PATCH 03/15] arm64: Fix field references for ICH_PPI_DVIR[01]_EL2 Marc Zyngier
2026-03-26 15:35 ` [PATCH 04/15] KVM: arm64: Fix writeable mask for ID_AA64PFR2_EL1 Marc Zyngier
2026-03-26 15:35 ` [PATCH 05/15] KVM: arm64: Account for RESx bits in __compute_fgt() Marc Zyngier
2026-03-26 15:35 ` [PATCH 06/15] KVM: arm64: vgic-v5: Hold config_lock while finalizing GICv5 PPIs Marc Zyngier
2026-03-26 15:35 ` [PATCH 07/15] KVM: arm64: vgic-v5: Transfer edge pending state to ICH_PPI_PENDRx_EL2 Marc Zyngier
2026-03-26 15:35 ` [PATCH 08/15] KVM: arm64: vgic-v5: Cast vgic_apr to u32 to avoid undefined behaviours Marc Zyngier
2026-03-26 15:35 ` [PATCH 09/15] KVM: arm64: vgic-v5: align priority comparison with other GICs Marc Zyngier
2026-03-26 15:35 ` [PATCH 10/15] KVM: arm64: vgic-v5: Correctly set dist->ready once initialised Marc Zyngier
2026-03-26 15:35 ` [PATCH 11/15] KVM: arm64: Kill arch_timer_context::direct field Marc Zyngier
2026-03-26 15:35 ` [PATCH 12/15] KVM: arm64: Remove evaluation of timer state in kvm_cpu_has_pending_timer() Marc Zyngier
2026-03-26 15:35 ` [PATCH 13/15] KVM: arm64: Move GICv5 timer PPI validation into timer_irqs_are_valid() Marc Zyngier
2026-03-26 15:35 ` [PATCH 14/15] KVM: arm64: Correctly plumb ID_AA64PFR2_EL1 into pkvm idreg handling Marc Zyngier
2026-03-26 15:35 ` [PATCH 15/15] KVM: arm64: Don't advertises GICv3 in ID_PFR1_EL1 if AArch32 isn't supported Marc Zyngier

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