From: Steffen Eiden <seiden@linux.ibm.com>
To: kvm@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org
Cc: Andreas Grapentin <Andreas.Grapentin@ibm.com>,
Arnd Bergmann <arnd@arndb.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Christian Borntraeger <borntraeger@linux.ibm.com>,
Claudio Imbrenda <imbrenda@linux.ibm.com>,
David Hildenbrand <david@kernel.org>,
Gautam Gala <ggala@linux.ibm.com>,
Hendrik Brueckner <brueckner@linux.ibm.com>,
Janosch Frank <frankja@linux.ibm.com>,
Joey Gouly <joey.gouly@arm.com>, Marc Zyngier <maz@kernel.org>,
Nina Schoetterl-Glausch <oss@nina.schoetterlglausch.eu>,
Oliver Upton <oupton@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Ulrich Weigand <Ulrich.Weigand@de.ibm.com>,
Will Deacon <will@kernel.org>, Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v1 06/27] arm64: Provide arm64 API for non-native architectures
Date: Thu, 2 Apr 2026 06:21:02 +0200 [thread overview]
Message-ID: <20260402042125.3948963-7-seiden@linux.ibm.com> (raw)
In-Reply-To: <20260402042125.3948963-1-seiden@linux.ibm.com>
Enable the usage of arm64 asm headers independent of the CPU
architecture. Introduce a new directory, include/arch/arm64/asm to store
(host) architecture- agnostic headers for arm64 implementors.
The new path is added to the include patch of native arm64. Therefore,
arm64 will continue to reference to those headers via include
<asm/header.h> without any code change. This means that the header names
should be unique for arm64 asm headers. For native arm64, headers at the
new path take precedence over any other include path.
For other architectures to use the esr string names, move *esr_class_str
from traps.c to esr.h.
For a seamless integration non-native architectures must also include the
new path to the include path.
Signed-off-by: Steffen Eiden <seiden@linux.ibm.com>
---
MAINTAINERS | 1 +
arch/arm64/Makefile | 2 +
arch/arm64/kernel/traps.c | 53 ------------------
.../arch/arm64}/asm/brk-imm.h | 0
.../include => include/arch/arm64}/asm/esr.h | 56 ++++++++++++++++++-
.../arch/arm64}/asm/sysreg-defs.h | 0
6 files changed, 56 insertions(+), 56 deletions(-)
rename {arch/arm64/include => include/arch/arm64}/asm/brk-imm.h (100%)
rename {arch/arm64/include => include/arch/arm64}/asm/esr.h (88%)
rename {arch/arm64/include => include/arch/arm64}/asm/sysreg-defs.h (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3f03ef9ee2bd..e0a101fe05ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3817,6 +3817,7 @@ S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git
F: Documentation/arch/arm64/
F: arch/arm64/
+F: include/arch/arm64/
F: include/uapi/arch/arm64/
F: drivers/virt/coco/arm-cca-guest/
F: drivers/virt/coco/pkvm-guest/
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 73a10f65ce8b..b244e837cedd 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -221,6 +221,8 @@ PHONY += virtconfig
virtconfig:
$(call merge_into_defconfig_override,defconfig,virt)
+LINUXINCLUDE := -I$(srctree)/include/arch/arm64/ $(LINUXINCLUDE)
+
define archhelp
echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 914282016069..ca679dcdf1c8 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -829,59 +829,6 @@ void do_el0_sys(unsigned long esr, struct pt_regs *regs)
do_el0_undef(regs, esr);
}
-static const char *esr_class_str[] = {
- [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
- [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
- [ESR_ELx_EC_WFx] = "WFI/WFE",
- [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
- [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
- [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
- [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
- [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
- [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
- [ESR_ELx_EC_PAC] = "PAC",
- [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
- [ESR_ELx_EC_BTI] = "BTI",
- [ESR_ELx_EC_ILL] = "PSTATE.IL",
- [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
- [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
- [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
- [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
- [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
- [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
- [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
- [ESR_ELx_EC_SVE] = "SVE",
- [ESR_ELx_EC_ERET] = "ERET/ERETAA/ERETAB",
- [ESR_ELx_EC_FPAC] = "FPAC",
- [ESR_ELx_EC_SME] = "SME",
- [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
- [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
- [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
- [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
- [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
- [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
- [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
- [ESR_ELx_EC_MOPS] = "MOPS",
- [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
- [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
- [ESR_ELx_EC_GCS] = "Guarded Control Stack",
- [ESR_ELx_EC_SERROR] = "SError",
- [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
- [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
- [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
- [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
- [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
- [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
- [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
- [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
- [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
-};
-
-const char *esr_get_class_string(unsigned long esr)
-{
- return esr_class_str[ESR_ELx_EC(esr)];
-}
-
/*
* bad_el0_sync handles unexpected, but potentially recoverable synchronous
* exceptions taken from EL0.
diff --git a/arch/arm64/include/asm/brk-imm.h b/include/arch/arm64/asm/brk-imm.h
similarity index 100%
rename from arch/arm64/include/asm/brk-imm.h
rename to include/arch/arm64/asm/brk-imm.h
diff --git a/arch/arm64/include/asm/esr.h b/include/arch/arm64/asm/esr.h
similarity index 88%
rename from arch/arm64/include/asm/esr.h
rename to include/arch/arm64/asm/esr.h
index 7e86d400864e..1c86202c1be4 100644
--- a/arch/arm64/include/asm/esr.h
+++ b/include/arch/arm64/asm/esr.h
@@ -7,8 +7,9 @@
#ifndef __ASM_ESR_H
#define __ASM_ESR_H
-#include <asm/memory.h>
-#include <asm/sysreg.h>
+#include <linux/const.h>
+#include <asm/sysreg-defs.h>
+#include <asm/brk-imm.h>
#define ESR_ELx_EC_UNKNOWN UL(0x00)
#define ESR_ELx_EC_WFx UL(0x01)
@@ -541,7 +542,56 @@ static inline bool esr_iss_is_eretab(unsigned long esr)
return esr & ESR_ELx_ERET_ISS_ERETA;
}
-const char *esr_get_class_string(unsigned long esr);
+static inline const char *esr_get_class_string(unsigned long esr)
+{
+ switch (ESR_ELx_EC(esr)) {
+ case ESR_ELx_EC_UNKNOWN: return "Unknown/Uncategorized";
+ case ESR_ELx_EC_WFx: return "WFI/WFE";
+ case ESR_ELx_EC_CP15_32: return "CP15 MCR/MRC";
+ case ESR_ELx_EC_CP15_64: return "CP15 MCRR/MRRC";
+ case ESR_ELx_EC_CP14_MR: return "CP14 MCR/MRC";
+ case ESR_ELx_EC_CP14_LS: return "CP14 LDC/STC";
+ case ESR_ELx_EC_FP_ASIMD: return "ASIMD";
+ case ESR_ELx_EC_CP10_ID: return "CP10 MRC/VMRS";
+ case ESR_ELx_EC_PAC: return "PAC";
+ case ESR_ELx_EC_CP14_64: return "CP14 MCRR/MRRC";
+ case ESR_ELx_EC_BTI: return "BTI";
+ case ESR_ELx_EC_ILL: return "PSTATE.IL";
+ case ESR_ELx_EC_SVC32: return "SVC (AArch32)";
+ case ESR_ELx_EC_HVC32: return "HVC (AArch32)";
+ case ESR_ELx_EC_SMC32: return "SMC (AArch32)";
+ case ESR_ELx_EC_SVC64: return "SVC (AArch64)";
+ case ESR_ELx_EC_HVC64: return "HVC (AArch64)";
+ case ESR_ELx_EC_SMC64: return "SMC (AArch64)";
+ case ESR_ELx_EC_SYS64: return "MSR/MRS (AArch64)";
+ case ESR_ELx_EC_SVE: return "SVE";
+ case ESR_ELx_EC_ERET: return "ERET/ERETAA/ERETAB";
+ case ESR_ELx_EC_FPAC: return "FPAC";
+ case ESR_ELx_EC_SME: return "SME";
+ case ESR_ELx_EC_IMP_DEF: return "EL3 IMP DEF";
+ case ESR_ELx_EC_IABT_LOW: return "IABT (lower EL)";
+ case ESR_ELx_EC_IABT_CUR: return "IABT (current EL)";
+ case ESR_ELx_EC_PC_ALIGN: return "PC Alignment";
+ case ESR_ELx_EC_DABT_LOW: return "DABT (lower EL)";
+ case ESR_ELx_EC_DABT_CUR: return "DABT (current EL)";
+ case ESR_ELx_EC_SP_ALIGN: return "SP Alignment";
+ case ESR_ELx_EC_MOPS: return "MOPS";
+ case ESR_ELx_EC_FP_EXC32: return "FP (AArch32)";
+ case ESR_ELx_EC_FP_EXC64: return "FP (AArch64)";
+ case ESR_ELx_EC_GCS: return "Guarded Control Stack";
+ case ESR_ELx_EC_SERROR: return "SError";
+ case ESR_ELx_EC_BREAKPT_LOW: return "Breakpoint (lower EL)";
+ case ESR_ELx_EC_BREAKPT_CUR: return "Breakpoint (current EL)";
+ case ESR_ELx_EC_SOFTSTP_LOW: return "Software Step (lower EL)";
+ case ESR_ELx_EC_SOFTSTP_CUR: return "Software Step (current EL)";
+ case ESR_ELx_EC_WATCHPT_LOW: return "Watchpoint (lower EL)";
+ case ESR_ELx_EC_WATCHPT_CUR: return "Watchpoint (current EL)";
+ case ESR_ELx_EC_BKPT32: return "BKPT (AArch32)";
+ case ESR_ELx_EC_VECTOR32: return "Vector catch (AArch32)";
+ case ESR_ELx_EC_BRK64: return "BRK (AArch64)";
+ default: return "UNRECOGNIZED EC";
+ }
+}
#endif /* __ASSEMBLER__ */
#endif /* __ASM_ESR_H */
diff --git a/arch/arm64/include/asm/sysreg-defs.h b/include/arch/arm64/asm/sysreg-defs.h
similarity index 100%
rename from arch/arm64/include/asm/sysreg-defs.h
rename to include/arch/arm64/asm/sysreg-defs.h
--
2.51.0
next prev parent reply other threads:[~2026-04-02 4:22 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-02 4:20 [PATCH v1 00/27] KVM: s390: Introduce arm64 KVM Steffen Eiden
2026-04-02 4:20 ` [PATCH v1 01/27] VFIO: take reference to the KVM module Steffen Eiden
2026-04-02 9:18 ` Paolo Bonzini
2026-04-02 4:20 ` [PATCH v1 02/27] KVM, vfio: remove symbol_get(kvm_get_kvm_safe) from vfio Steffen Eiden
2026-04-02 4:20 ` [PATCH v1 03/27] KVM, vfio: remove symbol_get(kvm_put_kvm) " Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 04/27] arm64: Provide arm64 UAPI for other host architectures Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 05/27] arm64: Extract sysreg definitions Steffen Eiden
2026-04-02 4:21 ` Steffen Eiden [this message]
2026-04-02 4:21 ` [PATCH v1 07/27] KVM: arm64: Provide arm64 KVM API for non-native architectures Steffen Eiden
2026-04-02 10:08 ` Marc Zyngier
2026-04-02 11:26 ` Christian Borntraeger
2026-04-02 4:21 ` [PATCH v1 08/27] arm64: Extract pstate definitions from ptrace Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 09/27] KVM: arm64: Share kvm_emulate definitions Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 10/27] KVM: arm64: Make some arm64 KVM code shareable Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 11/27] KVM: arm64: Access elements of vcpu_gp_regs individually Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 12/27] KVM: arm64: Share reset general register code Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 13/27] KVM: arm64: Extract & share ipa size shift calculation Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 14/27] KVM: s390: Move s390 kvm code into a subdirectory Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 15/27] KVM: S390: Refactor gmap Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 16/27] KVM: Make device name configurable Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 17/27] KVM: Remove KVM_MMIO as config option Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 18/27] KVM: s390: Prepare kvm-s390 for a second kvm module Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 19/27] s390: Introduce Start Arm Execution instruction Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 20/27] KVM: s390: arm64: Introduce host definitions Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 21/27] s390/hwcaps: Report SAE support as hwcap Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 22/27] KVM: s390: Add basic arm64 kvm module Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 23/27] KVM: s390: arm64: Implement required functions Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 24/27] KVM: s390: arm64: Implement vm/vcpu create destroy Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 25/27] KVM: s390: arm64: Implement vCPU IOCTLs Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 26/27] KVM: s390: arm64: Implement basic page fault handler Steffen Eiden
2026-04-02 4:21 ` [PATCH v1 27/27] KVM: s390: arm64: Enable KVM_ARM64 config and Kbuild Steffen Eiden
2026-04-02 8:53 ` [PATCH v1 00/27] KVM: s390: Introduce arm64 KVM David Hildenbrand (Arm)
2026-04-02 10:07 ` Christian Borntraeger
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