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charset=us-ascii Content-Disposition: inline In-Reply-To: <20260401-james-spe-impdef-decode-v1-1-ad0d372c220c@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260402_095534_668665_75147703 X-CRM114-Status: GOOD ( 22.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 01, 2026 at 03:25:49PM +0100, James Clark wrote: > We'll need the MIDR to dump IMPDEF events in the next commits so extract > a function for it. > > No functional changes intended. > > Signed-off-by: James Clark Reviewed-by: Leo Yan > --- > tools/perf/util/arm-spe.c | 36 ++++++++++++++++++++++-------------- > 1 file changed, 22 insertions(+), 14 deletions(-) > > diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c > index 70dd9bee47c7..7447b000f9cd 100644 > --- a/tools/perf/util/arm-spe.c > +++ b/tools/perf/util/arm-spe.c > @@ -958,14 +958,9 @@ static void arm_spe__synth_memory_level(struct arm_spe_queue *speq, > } > } > > -static void arm_spe__synth_ds(struct arm_spe_queue *speq, > - const struct arm_spe_record *record, > - union perf_mem_data_src *data_src) > +static int arm_spe__get_midr(struct arm_spe *spe, int cpu, u64 *midr) > { > - struct arm_spe *spe = speq->spe; > - u64 *metadata = NULL; > - u64 midr; > - unsigned int i; > + u64 *metadata; > > /* Metadata version 1 assumes all CPUs are the same (old behavior) */ > if (spe->metadata_ver == 1) { > @@ -973,15 +968,28 @@ static void arm_spe__synth_ds(struct arm_spe_queue *speq, > > pr_warning_once("Old SPE metadata, re-record to improve decode accuracy\n"); > cpuid = perf_env__cpuid(perf_session__env(spe->session)); > - midr = strtol(cpuid, NULL, 16); > - } else { > - metadata = arm_spe__get_metadata_by_cpu(spe, speq->cpu); > - if (!metadata) > - return; > - > - midr = metadata[ARM_SPE_CPU_MIDR]; > + *midr = strtol(cpuid, NULL, 16); > + return 0; > } > > + metadata = arm_spe__get_metadata_by_cpu(spe, cpu); > + if (!metadata) > + return -EINVAL; > + > + *midr = metadata[ARM_SPE_CPU_MIDR]; > + return 0; > +} > + > +static void arm_spe__synth_ds(struct arm_spe_queue *speq, > + const struct arm_spe_record *record, > + union perf_mem_data_src *data_src) > +{ > + u64 midr; > + unsigned int i; > + > + if (arm_spe__get_midr(speq->spe, speq->cpu, &midr)) > + return; > + > for (i = 0; i < ARRAY_SIZE(data_source_handles); i++) { > if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) { > return data_source_handles[i].ds_synth(record, data_src); > > -- > 2.34.1 > >