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From: Jakub Kicinski <kuba@kernel.org>
To: wei.fang@nxp.com
Cc: Jakub Kicinski <kuba@kernel.org>,
	claudiu.manoil@nxp.com, vladimir.oltean@nxp.com,
	xiaoning.wang@nxp.com, andrew+netdev@lunn.ch,
	davem@davemloft.net, edumazet@google.com, pabeni@redhat.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	f.fainelli@gmail.com, frank.li@nxp.com, chleroy@kernel.org,
	horms@kernel.org, linux@armlinux.org.uk, andrew@lunn.ch,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev
Subject: Re: [PATCH v4 net-next 13/14] net: dsa: netc: initialize buffer bool table and implement flow-control
Date: Thu,  2 Apr 2026 18:17:45 -0700	[thread overview]
Message-ID: <20260403011745.1795759-1-kuba@kernel.org> (raw)
In-Reply-To: <20260331113025.1566878-14-wei.fang@nxp.com>

This is an AI-generated review of your patch. The human sending this
email has considered the AI review valid, or at least plausible.
---
net: dsa: netc: initialize buffer bool table and implement flow-control

This commit adds buffer pool initialization and flow control support for the
NXP netc switch. It maps frame priorities to specific buffer pools and
configures transmission pause thresholds.

> diff --git a/drivers/net/dsa/netc/netc_main.c b/drivers/net/dsa/netc/netc_main.c
> index 3609d83ac363..688dceb486c2 100644
> --- a/drivers/net/dsa/netc/netc_main.c
> +++ b/drivers/net/dsa/netc/netc_main.c
[ ... ]
> @@ -386,6 +388,15 @@ static void netc_port_fixed_config(struct netc_port *np)
>  	/* Enable L2 and L3 DOS */
>  	netc_port_rmw(np, NETC_PCR, PCR_L2DOSE | PCR_L3DOSE,
>  		      PCR_L2DOSE | PCR_L3DOSE);
> +
> +	/* Set the quanta value of TX PAUSE frame */
> +	netc_mac_port_wr(np, NETC_PM_PAUSE_QUANTA(0), pqnt);
> +
> +	/* When a quanta timer counts down and reaches this value,
> +	 * the MAC sends a refresh PAUSE frame with the programmed
> +	 * full quanta value if a pause condition still exists.
> +	 */
> +	netc_mac_port_wr(np, NETC_PM_PAUSE_TRHESH(0), qth);

This isn't a bug, but there's a typo in the macro name (TRHESH instead of
THRESH).

[ ... ]
> +static u32 netc_get_buffer_pool_num(struct netc_switch *priv)
> +{
> +	/* The BPCAPR register is a read only register, the hardware
> +	 * guarantees that the BPCAPR_NUM_BP field will not be 0.
> +	 */
> +	return netc_base_rd(&priv->regs, NETC_BPCAPR) & BPCAPR_NUM_BP;
> +}
[ ... ]
> +static void netc_ipv_to_buffer_pool_mapping(struct netc_switch *priv)
> +{
> +	int bp_per_port = priv->num_bp / priv->info->num_ports;
> +	int q = NETC_IPV_NUM / bp_per_port;
> +	int r = NETC_IPV_NUM % bp_per_port;

If the hardware register read in netc_get_buffer_pool_num() returns a value
smaller than priv->info->num_ports (for instance, during a bus error or
reset state), bp_per_port will evaluate to 0.

Can this lead to a division by zero panic here?

Should priv->num_bp be validated against the number of ports before
performing this calculation to ensure the driver fails gracefully if the
hardware returns an unexpected value?

[ ... ]
> diff --git a/drivers/net/dsa/netc/netc_switch_hw.h b/drivers/net/dsa/netc/netc_switch_hw.h
> index c6a0c0a8ff8a..1e1c0d279a21 100644
> --- a/drivers/net/dsa/netc/netc_switch_hw.h
> +++ b/drivers/net/dsa/netc/netc_switch_hw.h
[ ... ]
> @@ -145,6 +152,12 @@ enum netc_stg_stage {
>  #define NETC_PM_IEVENT(a)		(0x1040 + (a) * 0x400)
>  #define  PM_IEVENT_RX_EMPTY		BIT(6)
>  
> +#define NETC_PM_PAUSE_QUANTA(a)		(0x1054 + (a) * 0x400)
> +#define  PAUSE_QUANTA_PQNT		GENMASK(15, 0)
> +
> +#define NETC_PM_PAUSE_TRHESH(a)		(0x1064 + (a) * 0x400)
> +#define  PAUSE_TRHESH_QTH		GENMASK(15, 0)

This isn't a bug, but there's a typo in the macro names here as well
(TRHESH instead of THRESH).


  reply	other threads:[~2026-04-03  1:17 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-31 11:30 [PATCH v4 net-next 00/14] Add preliminary NETC switch support for i.MX94 Wei Fang
2026-03-31 11:30 ` [PATCH v4 net-next 01/14] dt-bindings: net: dsa: update the description of 'dsa,member' property Wei Fang
2026-03-31 11:30 ` [PATCH v4 net-next 02/14] dt-bindings: net: dsa: add NETC switch Wei Fang
2026-03-31 11:30 ` [PATCH v4 net-next 03/14] net: enetc: add pre-boot initialization for i.MX94 switch Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 04/14] net: enetc: add basic operations to the FDB table Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 05/14] net: enetc: add support for the "Add" operation to VLAN filter table Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 06/14] net: enetc: add support for the "Update" operation to buffer pool table Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 07/14] net: enetc: add support for "Add" and "Delete" operations to IPFT Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 08/14] net: enetc: add multiple command BD rings support Wei Fang
2026-03-31 11:30 ` [PATCH v4 net-next 09/14] net: dsa: add NETC switch tag support Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 10/14] net: dsa: netc: introduce NXP NETC switch driver for i.MX94 Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 11/14] net: dsa: netc: add phylink MAC operations Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 12/14] net: dsa: netc: add more basic functions support Wei Fang
2026-04-03  1:17   ` Jakub Kicinski
2026-03-31 11:30 ` [PATCH v4 net-next 13/14] net: dsa: netc: initialize buffer bool table and implement flow-control Wei Fang
2026-04-03  1:17   ` Jakub Kicinski [this message]
2026-03-31 11:30 ` [PATCH v4 net-next 14/14] net: dsa: netc: add support for the standardized counters Wei Fang

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