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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	 Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org,  Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH 1/3] dt-bindings: iommu: arm-smmu-v3: Allow PMU child nodes
Date: Thu, 9 Apr 2026 10:10:38 +0200	[thread overview]
Message-ID: <20260409-outstanding-arboreal-peacock-2de6f1@quoll> (raw)
In-Reply-To: <20260408-smmu-perf-v1-1-d75dac96e828@nxp.com>

On Wed, Apr 08, 2026 at 03:51:15PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The Arm SMMU v3 specification defines an optional PMCG (Performance

"optional" in a meaning some SMMUv3 implementations do not have it?

> Monitor Control Group) block. Per MMU-700 TRM, it has three 64KB pages,
> with TCU Performance Monitor Counter Group (PMCG) registers starting at
> offset 0x02000 in page 0. So PMCG could be described as a child node of the
> SMMU in Devicetree.
> 
> Add a patternProperties entry to the arm,smmu-v3 binding to allow child
> nodes matching "pmu@<addr>" and reference the existing
> arm,smmu-v3-pmcg.yaml schema.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> index 82957334bea24402b583e47eb61b5724c91e4378..1d09c5476e5f1a7c3e5c935b677641ee6cc9897e 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
> @@ -50,6 +50,10 @@ properties:
>              - cmdq-sync   # CMD_SYNC complete
>              - priq        # PRI Queue not empty
>  
> +  '#address-cells': true

Instead enum [1, 2]

> +  '#size-cells': true

Same here

> +  ranges: true

I guess only one mapping is allowed so:
maxItems: 1

> +
>    '#iommu-cells':
>      const: 1
>  
> @@ -83,6 +87,12 @@ properties:
>        register access with page 0 offsets. Set for Cavium ThunderX2 silicon that
>        doesn't support SMMU page1 register space.
>  
> +patternProperties:
> +  '^pmu@[0-9a-f]+$':
> +    type: object
> +    $ref: /schemas/perf/arm,smmu-v3-pmcg.yaml#
> +    unevaluatedProperties: false

Please add another example with 4-space indentation.

> +
>  allOf:
>    - if:
>        not:
> 
> -- 
> 2.37.1
> 


  reply	other threads:[~2026-04-09  8:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-08  7:51 [PATCH 0/3] arm-smmu-v3: Add PMCG child support and update PMU MMIO mapping Peng Fan (OSS)
2026-04-08  7:51 ` [PATCH 1/3] dt-bindings: iommu: arm-smmu-v3: Allow PMU child nodes Peng Fan (OSS)
2026-04-09  8:10   ` Krzysztof Kozlowski [this message]
2026-04-09 12:45     ` Peng Fan
2026-04-08  7:51 ` [PATCH 2/3] iommu/arm-smmu-v3: Populate PMU child devices from Devicetree Peng Fan (OSS)
2026-04-08  7:51 ` [PATCH 3/3] perf/arm-smmuv3: Avoid double-requesting shared SMMU MMIO for PMCG Peng Fan (OSS)
2026-04-08 11:15 ` [PATCH 0/3] arm-smmu-v3: Add PMCG child support and update PMU MMIO mapping Robin Murphy
2026-04-08 13:47   ` Peng Fan
2026-04-10 12:07     ` Robin Murphy
2026-04-14  7:47       ` Peng Fan
2026-04-14  9:32         ` Robin Murphy

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