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charset=us-ascii Content-Disposition: inline In-Reply-To: <20260415115559.2227718-9-maz@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260417_082150_296066_6308D71D X-CRM114-Status: GOOD ( 18.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 15, 2026 at 12:55:49PM +0100, Marc Zyngier wrote: > Despite adding the necessary infrastructure to identify irq types, > vgic_get_vcpu_irq() treats GICv5 PPIs in a special way, which > impairs the readability of the code. > > Use the existing irq classifiers to handle per-CPU irqs for all > vgic types, and let the normal control flow reach global interrupt > handling without any v5-specific path. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/vgic/vgic.c | 25 ++++++++++++------------- > 1 file changed, 12 insertions(+), 13 deletions(-) > > diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c > index 3ac6d49bc4876..b697678d68b01 100644 > --- a/arch/arm64/kvm/vgic/vgic.c > +++ b/arch/arm64/kvm/vgic/vgic.c > @@ -106,24 +106,23 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid) > > struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid) > { > + enum kvm_device_type type; > + > if (WARN_ON(!vcpu)) > return NULL; > > - if (vgic_is_v5(vcpu->kvm)) { > - u32 int_num, hwirq_id; > - > - if (!__irq_is_ppi(KVM_DEV_TYPE_ARM_VGIC_V5, intid)) > - return NULL; > - > - hwirq_id = FIELD_GET(GICV5_HWIRQ_ID, intid); > - int_num = array_index_nospec(hwirq_id, VGIC_V5_NR_PRIVATE_IRQS); > + type = vcpu->kvm->arch.vgic.vgic_model; > > - return &vcpu->arch.vgic_cpu.private_irqs[int_num]; > - } > + if (__irq_is_sgi(type, intid) || __irq_is_ppi(type, intid)) { > + switch (type) { > + case KVM_DEV_TYPE_ARM_VGIC_V5: > + intid = vgic_v5_get_hwirq_id(intid); > + intid = array_index_nospec(intid, VGIC_V5_NR_PRIVATE_IRQS); > + break; > + default: > + intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS); > + } > > - /* SGIs and PPIs */ > - if (intid < VGIC_NR_PRIVATE_IRQS) { > - intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS); > return &vcpu->arch.vgic_cpu.private_irqs[intid]; > } > It preserves the behaviour of returning NULL for anything other than PPI on gic-v5, because the fallthrough to vgic_get_irq() returns NULL for gic-v5 and __irq_is_sgi() is always false for gic-v5. Reviewed-by: Joey Gouly Thanks, Joey