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h=from:subject:message-id; bh=k4Kr8v8q1FzJJOLJ0lZjjhg5zxTdGMz2I9k2MPOlTAM=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp6irw2cDO8cSi4WZXJsExZqMVHBtFBW7a1WDBa CLnNMXzBKGJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeoq8AAKCRD6PaqMvJYe 9X5vD/9+mjfe1eJ7O+OfqWBzusLSa6RXJlTyEM7SWHLTxXQBqA8MJElKGqzWsOe2SF3G8CgnqCB dXgrbQLP5GQB/eKAvbltWCtaZoQkaTL+EayvQSMZg6vWIkvukyI134syWdJv6oQfiq7+rLh4Cc1 0er/hagKhVY9njy8zwjawloAXixehcrtsZ2PP40edqTVXY4TfpHeNFxYekViStGeRUUEgMj7aMW W+02fzK7pCHKKYGJaVONlZBVm9lrAFQsmdlIavMLxOOuC82VYKAoOROJQvo9hg3XNSry0Xs4653 SGjSt+W9DZoiw/gcFBTWhWxeFgoLuNqHn9RPDQi0sjou6g4Oslxoof53C5CTlOARqmtXgReE4Lm /O5e83U/tKEGUA7+Gsy7D7/84H875r/32VbP/bxMmclD6iAhGhk1v7F20K6RgM/PoWmG4Ihjr5M dU1tkhGv0buOEs/YUz46/s7LVBYswu5NJBMKfDKNQ9C244GKeSN0pl1N+g+Wx5jb3MLSbsPY3lN 9sCPV1tXx4rXqDQIvm8ysHyts7CU/IEErL653UUTxIehiBXVy1C5dkihTw5tbzQJdLycC8fpx8S iCCJkImZYnoYHz6BXkzFmWyql0Nf/3uYu07ZX+gYRH1RSTGSig25XWbc8AKXPE/7J+4qo4YY4cY aWLwpjqteaGQiJA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260423_072153_007214_07FCBBF3 X-CRM114-Status: GOOD ( 20.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add new DRM pixel formats and add support for those in the Xilinx zynqmp display driver. All other formats except XVUY2101010 are already supported in upstream gstreamer, but gstreamer's kmssink does not have the support yet, as it obviously cannot support the formats without kernel having the formats. Xilinx has support for these formats in their BSP kernel, and Xilinx has a branch here, adding the support to gstreamer kmssink: https://github.com/Xilinx/gst-plugins-bad.git xlnx-rebase-v1.18.5 New formats added: DRM_FORMAT_Y8 - 8-bit Y-only - fourcc: "GREY" - gstreamer: GRAY8 DRM_FORMAT_XYYY2101010 - 10-bit Y-only, three pixels packed into 32-bits - fourcc: "YPA4" - gstreamer: GRAY10_LE32 DRM_FORMAT_P230 - Like NV16, but with 10-bit components - fourcc: "P230" - gstreamer: NV16_10LE32 DRM_FORMAT_T430 - 10-bit planar 4:4:4, with three samples packed into 32-bits - fourcc: "T430" - gstreamer: Y444_10LE32 XVUY2101010 - 10-bit 4:4:4, one pixel in 32 bits - fourcc: "XY30" Some notes: I know the 8-bit greyscale format has been discussed before, and the guidance was to use DRM_FORMAT_R8. While I'm not totally against that, I would argue that adding DRM_FORMAT_Y8 makes sense, as: 1) We can mark it as 'is_yuv' in the drm_format_info, and this can help the drivers handle e.g. full/limited range. Probably some hardware handles grayscale as a value used for all RGB components, in which case R8 makes sense, but when the hardware handles the Y-only pixels as YCbCr, where Cb and Cr are "neutral", it makes more sense to consider the format as an YUV format rather than RGB. 2) We can have the same fourcc as in v4l2. While not strictly necessary, it's a constant source of confusion when the fourccs differ. 3) It (possibly) makes more sense for the user to use Y8/GREY format instead of R8, as, in my experience, the documentation usually refers to gray(scale) format or Y-only format. I have made some adjustments to the formats compared to the Xilinx's branch. E.g. The DRM_FORMAT_XYYY2101010 format in Xilinx's kmssink uses fourcc "Y10 ", and DRM_FORMAT_Y10. I didn't like those, as the format is a packed format, three 10-bit pixels in a 32-bit container, and I think Y10 means a 10-bit pixel in a 16-bit container. Xilinx also has XV15/XV20 formats, of which XV15 already exists in the kernel as P030, and XV20 is added here as P230. Generally speaking, if someone has good ideas for the format define names or fourccs, speak up, as it's not easy to invent good names =). That said, keeping them the same as in the Xilinx trees will, of course, be slightly easier for the users of Xilinx platforms. Note: Earlier versions of the series had DRM_FORMAT_Y10_P32, which is now DRM_FORMAT_XYYY2101010, DRM_FORMAT_XV15, which is now removed as P030 already exists. DRM_FORMAT_P230 used to be DRM_FORMAT_XV20, and DRM_FORMAT_T430 used to be DRM_FORMAT_X403. [1] https://lore.kernel.org/all/20250109150310.219442-26-tzimmermann%40suse.de/ [2] git@github.com:tomba/kmsxx.git xilinx [3] git@github.com:tomba/pykms.git xilinx [4] git@github.com:tomba/pixutils.git xilinx Signed-off-by: Tomi Valkeinen --- Changes in v10: - Rename DRM_FORMAT_XV20 to DRM_FORMAT_P230 to be aligned with DRM_FORMAT_P030 - Rename DRM_FORMAT_X403 to DRM_FORMAT_T430 - Link to v9: https://lore.kernel.org/r/20260325-xilinx-formats-v9-0-d03b7e3752e4@ideasonboard.com Changes in v9: - Drop DRM_FORMAT_XV15 as DRM_FORMAT_P030 already exists - Rename DRM_FORMAT_Y10_P32 to DRM_FORMAT_XYYY2101010 - I kept the Reviewed-bys related to the above, although one could say renaming the format names is a substantial change. Ping me if you want me to drop the Rb and re-send. - Link to v8: https://lore.kernel.org/r/20260128-xilinx-formats-v8-0-9ea8adb70269@ideasonboard.com Changes in v8: - Expand the "drm/fourcc: Add DRM_FORMAT_Y8" commit description to explain the rationale - Add comment to "drm: xlnx: zynqmp: Add support for Y8 and Y10_P32" explainig the Y-only matrix - Remove extra blank line - Link to v7: https://lore.kernel.org/r/20251201-xilinx-formats-v7-0-1e1558adfefc@ideasonboard.com Changes in v7: - Added Reviewed-bys - Rebased on v6.18 - Link to v6: https://lore.kernel.org/r/20251001-xilinx-formats-v6-0-014b076b542a@ideasonboard.com Changes in v6: - Added tags for reviews - Rebased on v6.17 - Link to v5: https://lore.kernel.org/r/20250425-xilinx-formats-v5-0-c74263231630@ideasonboard.com Changes in v5: - Add comment about Y-only formats, clarifying how the display pipeline handles them (they're handled as YCbCr, with Cb and Cr as "neutral") - Clarify X403 format in the patch description - Set unused Y-only CSC offsets to 0 (instead of 0x1800). - Add R-bs - Link to v4: https://lore.kernel.org/r/20250326-xilinx-formats-v4-0-322a300c6d72@ideasonboard.com Changes in v4: - Reformat the drm_format_info entries a bit - Calculate block size only once in drm_format_info_bpp() - Declare local variables in separate lines - Add review tags - Fix commit message referring to Y10_LE32 (should be Y10_P32) - Link to v3: https://lore.kernel.org/r/20250212-xilinx-formats-v3-0-90d0fe106995@ideasonboard.com Changes in v3: - Drop "drm: xlnx: zynqmp: Fix max dma segment size". It is already pushed. - Add XVUY2101010 format. - Rename DRM_FORMAT_Y10_LE32 to DRM_FORMAT_Y10_P32. - Link to v2: https://lore.kernel.org/r/20250115-xilinx-formats-v2-0-160327ca652a@ideasonboard.com Changes in v2: - I noticed V4L2 already has fourcc Y10P, referring to MIPI-style packed Y10 format. So I changed Y10_LE32 fourcc to YPA4. If logic has any relevance here, P means packed, A means 10, 4 means "in 4 bytes". - Added tags to "Fix max dma segment size" patch - Updated description for "Add warning for bad bpp" - Link to v1: https://lore.kernel.org/r/20241204-xilinx-formats-v1-0-0bf2c5147db1@ideasonboard.com --- Tomi Valkeinen (11): drm/fourcc: Add warning for bad bpp drm/fourcc: Add DRM_FORMAT_P230 drm/fourcc: Add DRM_FORMAT_Y8 drm/fourcc: Add DRM_FORMAT_XYYY2101010 drm/fourcc: Add DRM_FORMAT_T430 drm/fourcc: Add DRM_FORMAT_XVUY2101010 drm: xlnx: zynqmp: Use drm helpers when calculating buffer sizes drm: xlnx: zynqmp: Add support for P030 & P230 drm: xlnx: zynqmp: Add support for Y8 and XYYY2101010 drm: xlnx: zynqmp: Add support for T430 drm: xlnx: zynqmp: Add support for XVUY2101010 drivers/gpu/drm/drm_fourcc.c | 25 +++++++++++++++-- drivers/gpu/drm/xlnx/zynqmp_disp.c | 56 +++++++++++++++++++++++++++++++++++--- include/uapi/drm/drm_fourcc.h | 28 +++++++++++++++++++ 3 files changed, 102 insertions(+), 7 deletions(-) --- base-commit: 11439c4635edd669ae435eec308f4ab8a0804808 change-id: 20241120-xilinx-formats-f71901621833 Best regards, -- Tomi Valkeinen