[PATCH 6.18.y 0/6] arm64: Stable backport of the C1-Pro erratum 4193714 workaround

Catalin Marinas
2026-04-21T10:00:35Z

Hi Greg, Sasha,

As the workaround for this CPU bug just went in, I'm sending it for
stable 6.18. The first two patches are prerequisites to make the
backporting easier. I do not intend to send them for stable 6.12 since
SME is not supported in that version anyway (Android folk did their own
backports already).

A heads-up, the workaround itself is larger than the recommended max 100
lines suitability for stable backports.

Thanks.

Catalin Marinas (4):
arm64: tlb: Introduce __tlbi_sync_s1ish_{kernel,batch}() for TLB
maintenance
arm64: tlb: Pass the corresponding mm to __tlbi_sync_s1ish()
arm64: cputype: Add C1-Pro definitions
arm64: errata: Work around early CME DVMSync acknowledgement

Mark Rutland (2):
arm64: tlb: Allow XZR argument to TLBI ops
arm64: tlb: Optimize ARM64_WORKAROUND_REPEAT_TLBI

Documentation/arch/arm64/silicon-errata.rst | 2 +
arch/arm64/Kconfig | 12 ++
arch/arm64/include/asm/cpucaps.h | 2 +
arch/arm64/include/asm/cputype.h | 2 +
arch/arm64/include/asm/fpsimd.h | 21 +++
arch/arm64/include/asm/tlbbatch.h | 10 +-
arch/arm64/include/asm/tlbflush.h | 143 ++++++++++++++++----
arch/arm64/kernel/cpu_errata.c | 30 ++++
arch/arm64/kernel/entry-common.c | 3 +
arch/arm64/kernel/fpsimd.c | 79 +++++++++++
arch/arm64/kernel/process.c | 36 +++++
arch/arm64/kernel/sys_compat.c | 2 +-
arch/arm64/kvm/hyp/nvhe/mm.c | 2 +-
arch/arm64/kvm/hyp/nvhe/tlb.c | 8 +-
arch/arm64/kvm/hyp/pgtable.c | 2 +-
arch/arm64/kvm/hyp/vhe/tlb.c | 10 +-
arch/arm64/tools/cpucaps | 1 +
17 files changed, 325 insertions(+), 40 deletions(-)