From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8490FDEE5E for ; Fri, 24 Apr 2026 03:05:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zWxKExStOAZc57km/2fM7Wk/MBk+KqJmr+NV+wNKQG0=; b=B16RrW+alVF/Ffz2FhG+FGeEsd Z7wrQKkCjnrQt8oLam6zH0ANoCRdOIhicd02DgCSTLPZ/0XOPrdmWLkD5xskFurP0lOKwIvY/6SCK y2Ih4eatKbOh4XQLiBUu0gBAhhibhPpCdnGBESHBvwQHYgmVD3NoM9wxYP84u7LuyZF62l9630ek6 hOwPrHkZS3H8AlRnDstXqONmDkS/hxadSma7YHmL6ETP/Lmd05sJgUJhNdzn2ILLqZb0hJ5e7NTsK bxbkDr4phgSEeA1hbr7QZ1B59BbKtnUJk28hsmpm8oQjC0ovCfh6nHSpz8dm6y7afVKiY3sqdGw+J gUaaDcJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1wG6rV-0000000CZ1m-2Q21; Fri, 24 Apr 2026 03:05:49 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1wG6rM-0000000CYtt-0CsN; Fri, 24 Apr 2026 03:05:41 +0000 X-UUID: 7874fe5c3f8a11f19e7563141e833ce8-20260423 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=zWxKExStOAZc57km/2fM7Wk/MBk+KqJmr+NV+wNKQG0=; b=HoXBvwVbxLMmR9eUHYNya1q100hf3US7rqbqpPhxTL1ysYtDuU3X46nGhK2YLOUKg46yNm0w77h+d5KQq0jiP3TfaL1KuOrY9A5llv+ogAb2xeaObh4CBkkR6s4ThYZ+51mYeRo4W6R9bDm8sv6gWKb2pA3q4L8BCDJWi3Z7dmM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.12,REQID:9b181b02-b8fd-47c9-9692-6b3d98909145,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:e7bac3a,CLOUDID:3f27d48f-6df4-4a3d-a7a4-fbdc42d669ce,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|865|888|898,TC:-5,Cont ent:0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0 ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 7874fe5c3f8a11f19e7563141e833ce8-20260423 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1323932649; Thu, 23 Apr 2026 20:05:38 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Fri, 24 Apr 2026 11:05:35 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Fri, 24 Apr 2026 11:05:34 +0800 From: Kyrie Wu To: Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , Hans Verkuil , Nicolas Dufresne , Nathan Hebert , Arnd Bergmann , Irui Wang , George Sun , , , , , CC: Neil Armstrong , Andrzej Pietrasiewicz , Yilong Zhou Subject: [PATCH v9 3/9] media: mediatek: vcodec: Refactor Decoder profile & level Handling Date: Fri, 24 Apr 2026 11:05:21 +0800 Message-ID: <20260424030527.10656-4-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260424030527.10656-1-kyrie.wu@mediatek.com> References: <20260424030527.10656-1-kyrie.wu@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260423_200540_097635_6FB15BA3 X-CRM114-Status: GOOD ( 14.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit refactors the handling of decoder parameters for H264, H265, and VP9 codecs by introducing a new structure to standardize supported level and profile information. By leveraging this change, chipset-specific conditional logic in the codec configuration functions is significantly reduced. Signed-off-by: Kyrie Wu Reviewed-by: AngeloGioacchino Del Regno --- .../vcodec/decoder/mtk_vcodec_dec_drv.h | 16 ++ .../vcodec/decoder/mtk_vcodec_dec_stateful.c | 12 ++ .../vcodec/decoder/mtk_vcodec_dec_stateless.c | 165 ++++++++++-------- 3 files changed, 118 insertions(+), 75 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index 7921588bf814..4ffc0eae855b 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -78,6 +78,16 @@ struct vdec_pic_info { unsigned int reserved; }; +/** + * struct mtk_vcodec_dec_params - decoder supported parameters + * @level: decoder supported vcodec level + * @profile: decoder supported vcodec profile + */ +struct mtk_vcodec_dec_params { + s64 level; + s64 profile; +}; + /** * struct mtk_vcodec_dec_pdata - compatible data for each IC * @init_vdec_params: init vdec params @@ -98,6 +108,9 @@ struct vdec_pic_info { * @is_subdev_supported: whether support parent-node architecture(subdev) * @uses_stateless_api: whether the decoder uses the stateless API with requests * @chip_model: platforms configuration values + * @h264_params: H264 decoder default supported params + * @h265_params: H265 decoder default supported params + * @vp9_params: VP9 decoder default supported params */ struct mtk_vcodec_dec_pdata { void (*init_vdec_params)(struct mtk_vcodec_dec_ctx *ctx); @@ -120,6 +133,9 @@ struct mtk_vcodec_dec_pdata { bool is_subdev_supported; bool uses_stateless_api; unsigned int chip_model; + struct mtk_vcodec_dec_params h264_params; + struct mtk_vcodec_dec_params h265_params; + struct mtk_vcodec_dec_params vp9_params; }; /** diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateful.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateful.c index 0e702d6a43ed..64f32976d15e 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateful.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateful.c @@ -619,4 +619,16 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8173_pdata = { .is_subdev_supported = false, .hw_arch = MTK_VDEC_PURE_SINGLE_CORE, .chip_model = 8173, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_4_1, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_4_0, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_1, + }, }; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c index 5ecbfc169805..efcd28f5f289 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c @@ -571,106 +571,49 @@ static const struct v4l2_ctrl_ops mtk_vcodec_dec_ctrl_ops = { static void mtk_vcodec_dec_fill_h264_level(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8192: - case 8188: - cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_5_2; - break; - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_6_0; - break; - case 8183: - case 8186: - cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_4_2; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_H264_LEVEL_4_1; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->h264_params.level; } static void mtk_vcodec_dec_fill_h264_profile(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8188: - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->h264_params.profile; } static void mtk_vcodec_dec_fill_h265_level(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8188: - cfg->max = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1; - break; - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_HEVC_LEVEL_4; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->h265_params.level; } static void mtk_vcodec_dec_fill_h265_profile(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8188: - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->h265_params.profile; } static void mtk_vcodec_dec_fill_vp9_level(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8192: - case 8188: - cfg->max = V4L2_MPEG_VIDEO_VP9_LEVEL_5_1; - break; - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_VP9_LEVEL_5_2; - break; - case 8186: - cfg->max = V4L2_MPEG_VIDEO_VP9_LEVEL_4_1; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_VP9_LEVEL_4_0; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->vp9_params.level; } static void mtk_vcodec_dec_fill_vp9_profile(struct v4l2_ctrl_config *cfg, struct mtk_vcodec_dec_ctx *ctx) { - switch (ctx->dev->chip_model) { - case 8188: - case 8195: - case 8196: - cfg->max = V4L2_MPEG_VIDEO_VP9_PROFILE_2; - break; - default: - cfg->max = V4L2_MPEG_VIDEO_VP9_PROFILE_1; - break; - } + struct mtk_vcodec_dec_dev *pdev = ctx->dev; + + cfg->max = pdev->vdec_pdata->vp9_params.profile; } static void mtk_vcodec_dec_reset_controls(struct v4l2_ctrl_config *cfg, @@ -936,6 +879,18 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8183_pdata = { .is_subdev_supported = false, .hw_arch = MTK_VDEC_PURE_SINGLE_CORE, .chip_model = 8183, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_4_2, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_4_0, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_1, + }, }; /* This platform data is used for one lat and one core architecture. */ @@ -975,24 +930,72 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8188_pdata = { MTK_STATELESS_DEC_DATA, .hw_arch = MTK_VDEC_LAT_SINGLE_CORE, .chip_model = 8188, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_2, + }, }; const struct mtk_vcodec_dec_pdata mtk_vdec_8192_pdata = { MTK_STATELESS_DEC_DATA, .hw_arch = MTK_VDEC_LAT_SINGLE_CORE, .chip_model = 8192, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_5_2, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_2, + }, }; const struct mtk_vcodec_dec_pdata mtk_vdec_8195_pdata = { MTK_STATELESS_DEC_DATA, .hw_arch = MTK_VDEC_LAT_SINGLE_CORE, .chip_model = 8195, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_5_1, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_1, + }, }; const struct mtk_vcodec_dec_pdata mtk_vdec_8196_pdata = { MTK_STATELESS_DEC_DATA, .hw_arch = MTK_VDEC_LAT_SINGLE_CORE, .chip_model = 8196, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_6_0, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_5_2, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_2, + }, }; const struct mtk_vcodec_dec_pdata mtk_vdec_single_core_pdata = { @@ -1016,4 +1019,16 @@ const struct mtk_vcodec_dec_pdata mtk_vdec_8186_pdata = { MTK_STATELESS_DEC_DATA, .hw_arch = MTK_VDEC_PURE_SINGLE_CORE, .chip_model = 8186, + .h264_params = { + .level = V4L2_MPEG_VIDEO_H264_LEVEL_4_2, + .profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + }, + .h265_params = { + .level = V4L2_MPEG_VIDEO_HEVC_LEVEL_4, + .profile = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, + }, + .vp9_params = { + .level = V4L2_MPEG_VIDEO_VP9_LEVEL_4_1, + .profile = V4L2_MPEG_VIDEO_VP9_PROFILE_1, + }, }; -- 2.45.2