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Tue, 28 Apr 2026 03:53:29 -0500 Received: from uda0498651.dhcp.ti.com (uda0498651.dhcp.ti.com [172.24.233.239]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 63S8q6MZ623293; Tue, 28 Apr 2026 03:53:25 -0500 From: Sai Sree Kartheek Adivi To: , , , , , , , , , , , , , CC: , Subject: [PATCH v6 17/19] dmaengine: ti: k3-udma-v2: Add support for PKTDMA V2 Date: Tue, 28 Apr 2026 14:21:46 +0530 Message-ID: <20260428085202.1724548-18-s-adivi@ti.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260428085202.1724548-1-s-adivi@ti.com> References: <20260428085202.1724548-1-s-adivi@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|BLAPR10MB5044:EE_ X-MS-Office365-Filtering-Correlation-Id: df05efd4-c231-4636-a653-08dea5039f0e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|7416014|82310400026|921020|56012099003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: x8UWRRmfs5HfZSKgRqllE5dH0RttbU9AYk0fHWVoinFJtfl9pko15gt+pULIda/QluZ6I1kqP4WWGaLOf4B+LYf4wZ/vR9BQ3W7dpG4jqlYA41KkrMJAe5HS/P/d3zpO0WTyQyT32SVbNB+35uYvEpaNp86WwMVE+GHGId0Eyg5efeIIXDMjp7qHvQQMkpLmClWK7qQHheZ1p9dNyqLyG4e4kTE7ZjQjVBNOBJ9j+qneBexINTTNvYYih9kRdQZomII03/RJ8K3WlxJki/2ugiT+WSAASdtkz0jaUhARrDBmbuqHLIsWuEHcBLuHYJmqsOlmCCa3A4hap4FJU+oz/CQUAz0wftYCjOz0u6FPGOA+h09FtHIAOoREhC3POgfn7NJ5SiZ70EBog8BUO7KN66N++0awsCr6uq/QxaC4De0+d1PhlNxiiTmdPs7npx1b X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Apr 2026 08:53:30.4030 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df05efd4-c231-4636-a653-08dea5039f0e X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.194];Helo=[lewvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLAPR10MB5044 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260428_015335_890954_EA808A5A X-CRM114-Status: GOOD ( 19.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PKTDMA V2 is different than the existing PKTDMA supported by the k3-udma driver. The changes in PKTDMA V2 are: - Autopair: There is no longer a need for PSIL pair and AUTOPAIR bit needs to set in the RT_CTL register. - Static channel mapping: Each channel is mapped to a single peripheral. - Direct IRQs: There is no INT-A and interrupt lines from DMA are directly connected to GIC. - Remote side configuration handled by DMA. So no need to write to PEER registers to START / STOP / PAUSE / TEARDOWN. - Unified Channel Space: Tx and Rx channels share a single register space. Each channel index is specifically fixed in hardware as either Tx or Rx in an interleaved manner. Signed-off-by: Sai Sree Kartheek Adivi --- drivers/dma/ti/k3-udma-common.c | 41 ++++-- drivers/dma/ti/k3-udma-v2.c | 214 ++++++++++++++++++++++++++++++-- drivers/dma/ti/k3-udma.h | 3 + 3 files changed, 234 insertions(+), 24 deletions(-) diff --git a/drivers/dma/ti/k3-udma-common.c b/drivers/dma/ti/k3-udma-common.c index df657c63cf02b..304dad59bf183 100644 --- a/drivers/dma/ti/k3-udma-common.c +++ b/drivers/dma/ti/k3-udma-common.c @@ -2460,12 +2460,21 @@ int pktdma_setup_resources(struct udma_dev *ud) ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt), sizeof(unsigned long), GFP_KERNEL); + bitmap_zero(ud->tchan_map, ud->tchan_cnt); ud->tchans = devm_kcalloc(dev, ud->tchan_cnt, sizeof(*ud->tchans), GFP_KERNEL); - ud->rchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->rchan_cnt), - sizeof(unsigned long), GFP_KERNEL); - ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), - GFP_KERNEL); + if (ud->match_data->version == K3_UDMA_V1) { + ud->rchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->rchan_cnt), + sizeof(unsigned long), GFP_KERNEL); + bitmap_zero(ud->rchan_map, ud->rchan_cnt); + ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans), + GFP_KERNEL); + } else { + ud->rchan_map = ud->tchan_map; + ud->rchans = ud->tchans; + ud->chan_map = ud->tchan_map; + ud->chans = ud->tchans; + } ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt), sizeof(unsigned long), GFP_KERNEL); @@ -2473,6 +2482,8 @@ int pktdma_setup_resources(struct udma_dev *ud) GFP_KERNEL); ud->tflow_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tflow_cnt), sizeof(unsigned long), GFP_KERNEL); + bitmap_zero(ud->tflow_map, ud->tflow_cnt); + if (!ud->tchan_map || !ud->rchan_map || !ud->tflow_map || !ud->tchans || !ud->rchans || !ud->rflows || !ud->rflow_in_use) @@ -2563,13 +2574,21 @@ int setup_resources(struct udma_dev *ud) } break; case DMA_TYPE_PKTDMA: - dev_info(dev, - "Channels: %d (tchan: %u, rchan: %u)\n", - ch_count, - ud->tchan_cnt - bitmap_weight(ud->tchan_map, - ud->tchan_cnt), - ud->rchan_cnt - bitmap_weight(ud->rchan_map, - ud->rchan_cnt)); + if (ud->match_data->version == K3_UDMA_V1) { + dev_info(dev, + "Channels: %d (tchan: %u, rchan: %u)\n", + ch_count, + ud->tchan_cnt - bitmap_weight(ud->tchan_map, + ud->tchan_cnt), + ud->rchan_cnt - bitmap_weight(ud->rchan_map, + ud->rchan_cnt)); + } else { + dev_info(dev, + "Channels: %d (tchan + rchan: %u)\n", + ch_count, + ud->chan_cnt - bitmap_weight(ud->chan_map, + ud->chan_cnt)); + } break; default: break; diff --git a/drivers/dma/ti/k3-udma-v2.c b/drivers/dma/ti/k3-udma-v2.c index 4b77d6380b1e9..5a64d0ff2d85a 100644 --- a/drivers/dma/ti/k3-udma-v2.c +++ b/drivers/dma/ti/k3-udma-v2.c @@ -740,6 +740,142 @@ static int bcdma_v2_alloc_chan_resources(struct dma_chan *chan) return ret; } +static int pktdma_v2_alloc_chan_resources(struct dma_chan *chan) +{ + struct udma_chan *uc = to_udma_chan(chan); + struct udma_dev *ud = to_udma_dev(chan->device); + struct platform_device *pdev = to_platform_device(ud->dev); + char irq_name[10]; + u32 irq_ring_idx; + int ret; + + /* + * Make sure that the completion is in a known state: + * No teardown, the channel is idle + */ + reinit_completion(&uc->teardown_completed); + complete_all(&uc->teardown_completed); + uc->state = UDMA_CHAN_IS_IDLE; + + switch (uc->config.dir) { + case DMA_MEM_TO_DEV: + /* Slave transfer synchronized - mem to dev (TX) transfer */ + dev_dbg(uc->ud->dev, "%s: chan%d as MEM-to-DEV\n", __func__, + uc->id); + + ret = udma_v2_alloc_tx_resources(uc); + if (ret) { + uc->config.remote_thread_id = -1; + return ret; + } + + uc->config.src_thread = ud->psil_base + uc->tchan->id; + uc->config.dst_thread = uc->config.remote_thread_id; + uc->config.dst_thread |= K3_PSIL_DST_THREAD_ID_OFFSET; + + irq_ring_idx = uc->config.mapped_channel_id; + break; + case DMA_DEV_TO_MEM: + /* Slave transfer synchronized - dev to mem (RX) transfer */ + dev_dbg(uc->ud->dev, "%s: chan%d as DEV-to-MEM\n", __func__, + uc->id); + + ret = udma_v2_alloc_rx_resources(uc); + if (ret) { + uc->config.remote_thread_id = -1; + return ret; + } + + uc->config.src_thread = uc->config.remote_thread_id; + uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | + K3_PSIL_DST_THREAD_ID_OFFSET; + + irq_ring_idx = uc->config.mapped_channel_id; + udma_write(uc->rflow->reg_rt, UDMA_RX_FLOWRT_RFA, BIT(28)); + break; + default: + /* Can not happen */ + dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n", + __func__, uc->id, uc->config.dir); + return -EINVAL; + } + + /* check if the channel configuration was successful */ + if (ret) + goto err_res_free; + + if (udma_is_chan_running(uc)) { + dev_warn(ud->dev, "chan%d: is running!\n", uc->id); + ud->reset_chan(uc, false); + if (udma_is_chan_running(uc)) { + dev_err(ud->dev, "chan%d: won't stop!\n", uc->id); + ret = -EBUSY; + goto err_res_free; + } + } + + uc->dma_dev = dmaengine_get_dma_device(chan); + uc->hdesc_pool = dma_pool_create(uc->name, uc->dma_dev, + uc->config.hdesc_size, ud->desc_align, + 0); + if (!uc->hdesc_pool) { + dev_err(ud->ddev.dev, + "Descriptor pool allocation failed\n"); + uc->use_dma_pool = false; + ret = -ENOMEM; + goto err_res_free; + } + + uc->use_dma_pool = true; + + uc->psil_paired = true; + + snprintf(irq_name, sizeof(irq_name), "chan%u", irq_ring_idx); + uc->irq_num_ring = platform_get_irq_byname(pdev, irq_name); + if (uc->irq_num_ring < 0) + return uc->irq_num_ring; + + ret = devm_request_irq(ud->dev, uc->irq_num_ring, udma_v2_ring_irq_handler, + IRQF_TRIGGER_HIGH, uc->name, uc); + + if (ret) { + dev_err(ud->dev, "chan%d: ring irq request failed\n", uc->id); + goto err_irq_free; + } + + uc->irq_num_udma = 0; + + udma_reset_rings(uc); + + INIT_DELAYED_WORK_ONSTACK(&uc->tx_drain.work, + udma_check_tx_completion); + + if (uc->tchan) + dev_dbg(ud->dev, + "chan%d: tchan%d, tflow%d, Remote thread: 0x%04x\n", + uc->id, uc->tchan->id, uc->tchan->tflow_id, + uc->config.remote_thread_id); + else if (uc->rchan) + dev_dbg(ud->dev, + "chan%d: rchan%d, rflow%d, Remote thread: 0x%04x\n", + uc->id, uc->rchan->id, uc->rflow->id, + uc->config.remote_thread_id); + return 0; + +err_irq_free: + uc->irq_num_ring = 0; +err_res_free: + udma_free_tx_resources(uc); + udma_free_rx_resources(uc); + + udma_reset_uchan(uc); + + dma_pool_destroy(uc->hdesc_pool); + uc->use_dma_pool = false; + + return ret; +} + static enum dma_status udma_v2_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) @@ -834,6 +970,7 @@ static int udma_v2_resume(struct dma_chan *chan) } static struct platform_driver bcdma_v2_driver; +static struct platform_driver pktdma_v2_driver; static bool udma_v2_dma_filter_fn(struct dma_chan *chan, void *param) { @@ -843,7 +980,8 @@ static bool udma_v2_dma_filter_fn(struct dma_chan *chan, void *param) struct udma_chan *uc; struct udma_dev *ud; - if (chan->device->dev->driver != &bcdma_v2_driver.driver) + if (chan->device->dev->driver != &bcdma_v2_driver.driver && + chan->device->dev->driver != &pktdma_v2_driver.driver) return false; uc = to_udma_chan(chan); @@ -986,11 +1124,34 @@ static struct udma_match_data bcdma_v2_am62l_data = { .rchan_cnt = 128, }; +static struct udma_match_data pktdma_v2_am62l_data = { + .type = DMA_TYPE_PKTDMA, + .version = K3_UDMA_V2, + .psil_base = 0x1000, + .enable_memcpy_support = false, /* PKTDMA does not support MEM_TO_MEM */ + .flags = UDMA_FLAGS_J7_CLASS, + .statictr_z_mask = GENMASK(23, 0), + .burst_size = { + TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */ + 0, /* No H Channels */ + 0, /* No UH Channels */ + }, + .tchan_cnt = 97, + .rchan_cnt = 97, + .chan_cnt = 97, + .tflow_cnt = 112, + .rflow_cnt = 112, +}; + static const struct of_device_id udma_of_match[] = { { .compatible = "ti,am62l-dmss-bcdma", .data = &bcdma_v2_am62l_data, }, + { + .compatible = "ti,am62l-dmss-pktdma", + .data = &pktdma_v2_am62l_data, + }, { /* Sentinel */ }, }; @@ -1009,15 +1170,22 @@ static int udma_v2_get_mmrs(struct platform_device *pdev, struct udma_dev *ud) if (IS_ERR(ud->mmrs[V2_MMR_GCFG])) return PTR_ERR(ud->mmrs[V2_MMR_GCFG]); - ud->bchan_cnt = ud->match_data->bchan_cnt; - /* There are no tchan and rchan in BCDMA_V2. + /* There are no tchan and rchan in BCDMA_V2 and PKTDMA_V2. * Duplicate chan as tchan and rchan to keep the common code - * in k3-udma-common.c functional for BCDMA_V2. + * in k3-udma-common.c functional. */ - ud->chan_cnt = ud->match_data->chan_cnt; - ud->tchan_cnt = ud->match_data->chan_cnt; - ud->rchan_cnt = ud->match_data->chan_cnt; - ud->rflow_cnt = ud->chan_cnt; + if (ud->match_data->type == DMA_TYPE_BCDMA) { + ud->bchan_cnt = ud->match_data->bchan_cnt; + ud->chan_cnt = ud->match_data->chan_cnt; + ud->tchan_cnt = ud->match_data->chan_cnt; + ud->rchan_cnt = ud->match_data->chan_cnt; + ud->rflow_cnt = ud->chan_cnt; + } else if (ud->match_data->type == DMA_TYPE_PKTDMA) { + ud->chan_cnt = ud->match_data->chan_cnt; + ud->tchan_cnt = ud->match_data->tchan_cnt; + ud->rchan_cnt = ud->match_data->rchan_cnt; + ud->rflow_cnt = ud->match_data->rflow_cnt; + } for (i = 1; i < V2_MMR_LAST; i++) { if (i == V2_MMR_BCHANRT && ud->bchan_cnt == 0) @@ -1071,6 +1239,7 @@ static int udma_v2_probe(struct platform_device *pdev) ud->reset_chan = udma_v2_reset_chan; ud->decrement_byte_counters = udma_v2_decrement_byte_counters; ud->bcdma_setup_sci_resources = NULL; + ud->pktdma_setup_sci_resources = NULL; ret = udma_v2_get_mmrs(pdev, ud); if (ret) @@ -1078,7 +1247,14 @@ static int udma_v2_probe(struct platform_device *pdev) struct k3_ringacc_init_data ring_init_data = {0}; - ring_init_data.num_rings = ud->bchan_cnt + ud->chan_cnt; + if (ud->match_data->type == DMA_TYPE_BCDMA) { + ring_init_data.num_rings = ud->bchan_cnt + ud->chan_cnt; + } else if (ud->match_data->type == DMA_TYPE_PKTDMA) { + ring_init_data.num_rings = ud->rflow_cnt; + + ud->rflow_rt = devm_platform_ioremap_resource_byname(pdev, "ringrt"); + ring_init_data.base_rt = ud->rflow_rt; + } ud->ringacc = k3_ringacc_dmarings_init(pdev, &ring_init_data); @@ -1087,8 +1263,10 @@ static int udma_v2_probe(struct platform_device *pdev) dma_cap_set(DMA_SLAVE, ud->ddev.cap_mask); - dma_cap_set(DMA_CYCLIC, ud->ddev.cap_mask); - ud->ddev.device_prep_dma_cyclic = udma_prep_dma_cyclic; + if (ud->match_data->type != DMA_TYPE_PKTDMA) { + dma_cap_set(DMA_CYCLIC, ud->ddev.cap_mask); + ud->ddev.device_prep_dma_cyclic = udma_prep_dma_cyclic; + } ud->ddev.device_config = udma_slave_config; ud->ddev.device_prep_slave_sg = udma_prep_slave_sg; @@ -1102,8 +1280,18 @@ static int udma_v2_probe(struct platform_device *pdev) ud->ddev.dbg_summary_show = udma_dbg_summary_show; #endif - ud->ddev.device_alloc_chan_resources = - bcdma_v2_alloc_chan_resources; + switch (ud->match_data->type) { + case DMA_TYPE_BCDMA: + ud->ddev.device_alloc_chan_resources = + bcdma_v2_alloc_chan_resources; + break; + case DMA_TYPE_PKTDMA: + ud->ddev.device_alloc_chan_resources = + pktdma_v2_alloc_chan_resources; + break; + default: + return -EINVAL; + } ud->ddev.device_free_chan_resources = udma_free_chan_resources; diff --git a/drivers/dma/ti/k3-udma.h b/drivers/dma/ti/k3-udma.h index 771088462f80d..642d8fc8f3175 100644 --- a/drivers/dma/ti/k3-udma.h +++ b/drivers/dma/ti/k3-udma.h @@ -23,8 +23,11 @@ #define UDMA_RX_FLOW_ID_FW_OES_REG 0x80 #define UDMA_RX_FLOW_ID_FW_STATUS_REG 0x88 +#define UDMA_RX_FLOWRT_RFA 0x8 + /* BCHANRT/TCHANRT/RCHANRT registers */ #define UDMA_CHAN_RT_CTL_REG 0x0 +#define UDMA_CHAN_RT_CFG_REG 0x4 #define UDMA_CHAN_RT_SWTRIG_REG 0x8 #define UDMA_CHAN_RT_STDATA_REG 0x80 -- 2.53.0