RE: [PATCH v3 2/3] arm64: dts: imx95: Add dma, intr, aer and pme interrupters for pcie{0,1}

Hongxing Zhu
2026-04-30T08:37:39Z

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Thursday, April 30, 2026 4:05 PM
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> bhelgaas@google.com; Frank Li <frank.li@nxp.com>; l.stach@pengutronix.de;
> lpieralisi@kernel.org; kwilczynski@kernel.org; mani@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; linux-
> pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; imx@lists.linux.dev; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v3 2/3] arm64: dts: imx95: Add dma, intr, aer and pme
> interrupters for pcie{0,1}
>
> On Thu, Apr 30, 2026 at 01:09:53PM +0800, Richard Zhu wrote:
> > Add dma, intr, aer and pme interrupters for pcie{0,1}.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx95.dtsi | 16 ++++++++++++----
> > 1 file changed, 12 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > index 71394871d8dd0..6896d9c15bf53 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > @@ -1861,8 +1861,12 @@ pcie0: pcie@4c300000 {
> > bus-range = <0x00 0xff>;
> > num-lanes = <1>;
> > num-viewport = <8>;
> > - interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
> > - interrupt-names = "msi";
>
> Why there is no fixes tag if this is here for two years and you claim that IT
> CANNOT work without these interrupts?
Regarding the Fixes tag: I think that it is not needed here because this is not
a bug fix.

The driver has been functional for two years using only the MSI interrupt. The
current implementation works correctly for basic PCIe operation. This patch
adds support for additional interrupt lines (dma, intr, aer, pme) to enable
enhanced features and capabilities that were previously not utilized.

This is a feature enhancement, not a correction of broken functionality. The
hardware supports these additional interrupts, and we're now exposing them in
the device tree to allow the driver to take advantage of enhanced features.

I hope this clarifies your concern.

Best Regards
Richard Zhu
>
> Best regards,
> Krzysztof