[PATCH 0/3] irqchip/gic-v5: Tidy up LPI allocation

[Sascha Bischoff <Sascha.Bischoff@arm.com>]

LPIs are owned by the LPI domain, so allocating and freeing them from
the ITS MSI and IPI domains was always a bit backwards. Those domains
should only ask their parent for interrupts, and never need to
know how the parent picks or releases the underlying LPIs (or do it on
behalf of said parent, as was the case).

This series moves LPI allocation into the LPI domain itself and
removes the exported wrappers that allowed LPI allocation from elsewhere.

With that done, the LPI domain can also be slightly reworked to
support allocating and freeing more than one LPI at a time. This
rework is extended to the IPI allocation, too. The last patch makes
the ITS MSI domain request its parent interrupts as a single range,
matching the IPI cleanup from the previous patch.

As a side effect of these changes, the IPI path now unwinds earlier
parent allocations correctly if a later allocation fails.

Thanks,
Sascha

Sascha Bischoff (3):
  irqchip/gic-v5: Move LPI alloc/free into LPI domain
  irqchip/gic-v5: Allow for nr_irqs > 1 for LPI alloc and teardown
  irqchip/gic-v5: Allocate ITS parent LPIs as a range

 drivers/irqchip/irq-gic-v5-its.c   | 34 +++--------
 drivers/irqchip/irq-gic-v5.c       | 90 ++++++++++++++++--------------
 include/linux/irqchip/arm-gic-v5.h |  3 -
 3 files changed, 56 insertions(+), 71 deletions(-)

-- 
2.34.1