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[47.54.130.67]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-51040b8174csm14655201cf.25.2026.05.01.05.41.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 May 2026 05:41:44 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wInBf-000000058bc-2ERN; Fri, 01 May 2026 09:41:43 -0300 Date: Fri, 1 May 2026 09:41:43 -0300 From: Jason Gunthorpe To: Mostafa Saleh Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, jean-philippe@linaro.org, mark.rutland@arm.com, qperret@google.com, tabba@google.com, vdonnefort@google.com, sebastianene@google.com, keirf@google.com Subject: Re: [PATCH v6 04/25] iommu/arm-smmu-v3: Move TLB range invalidation into common code Message-ID: <20260501124143.GB6912@ziepe.ca> References: <20260501111928.259252-1-smostafa@google.com> <20260501111928.259252-5-smostafa@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260501111928.259252-5-smostafa@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260501_054146_216127_34710605 X-CRM114-Status: GOOD ( 15.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 01, 2026 at 11:19:06AM +0000, Mostafa Saleh wrote: > Range TLB invalidation has a very specific algorithm. Instead of > re-writing it for the hypervisor, move it to a function that can > be re-used. I think this is too narrow. You should start at __arm_smmu_domain_inv_range() and shove all of that callchain into a new file "arm-smmuv3-tlbi.c" which you can then double compile for pkvm. pkvm would have to present the tlbi description and the invs array which shouldn't be hard for it. Then it will enjoy all the same hypervisor optimizations we are working on for the normal driver. I am about to send a patch series here for iommupt that significantly alters this. I think it will help your pkvm effort as the invalidation entry point becomes significantly decoupled from the iommu subsystem: static void arm_smmu_domain_tlbi_inv(struct arm_smmu_tlbi *tlbi, struct arm_smmu_invs *invs) struct arm_smmu_tlbi { struct arm_smmu_domain *smmu_domain; // Can be removed unsigned long start; unsigned long last; u8 leaf_levels_bitmap; u8 table_levels_bitmap; }; Which pkvm should have no trouble invoking. It has to build an invs, but I guess that is pretty simple and done once at boot for pkvm? Once done all the fiddly bits about building the commands would be shared. There is really no reason this should differ anyhow. https://github.com/jgunthorpe/linux/commits/iommu_pt_arm64/ cover-letter: Organize SMMUv3 the invalidation flow so iommupt can use it Jason