[PATCH 4/4] arm64: dts: imx8mp: remove LDB reg and reg-names property

Marco Felsch
2026-05-04T20:22:24Z

The blk-ctrl syscon device(s) have a very loose register definition, e.g
one register configures the USB PHY clock source, the PCIe EP ready bit
and enables PCIe and USB clocks. This would lead into multiple
sub-devices which use the same 'reg' which is wrong.

Instead of specifying the 'reg' in the OF each sub-device driver needs
to handle the correct bits on their own. Therefore drop the 'reg' and
'reg-names' porperty from the bridge node as well as the '@5c' register
suffix.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 90d7bb8f5619e50d9fd65bcf18c083affe15e6f9..41649afff813833aeb1c0355827597578048b037 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1999,10 +1999,8 @@ media_blk_ctrl: blk-ctrl@32ec0000 {
<1039500000>;
#power-domain-cells = <1>;

- lvds_bridge: bridge@5c {
+ lvds_bridge: bridge {
compatible = "fsl,imx8mp-ldb";
- reg = <0x5c 0x4>, <0x128 0x4>;
- reg-names = "ldb", "lvds";
clocks = <&clk IMX8MP_CLK_MEDIA_LDB_ROOT>;
clock-names = "ldb";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;

--
2.47.3