From: Richard Zhu <hongxing.zhu@nxp.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com
Cc: kernel@pengutronix.de, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v1] arm64: dts: imx95: Increase PCIe outbound address space to 2GB
Date: Fri, 8 May 2026 10:28:57 +0800 [thread overview]
Message-ID: <20260508022857.1500938-1-hongxing.zhu@nxp.com> (raw)
Expand the PCIe outbound memory region from the current size to 2GB
to support devices requiring larger address spaces.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index adcc0e1d3696b..201c0eae13948 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1940,7 +1940,7 @@ pcie0: pcie@4c300000 {
<0 0x4c340000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>,
- <0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000>;
+ <0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x80000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -2015,7 +2015,7 @@ pcie1: pcie@4c380000 {
<0 0x4c3c0000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000>,
- <0x82000000 0 0x10000000 0xa 0x10000000 0 0x10000000>;
+ <0x82000000 0 0x10000000 0xa 0x10000000 0 0x80000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
base-commit: d570a0d019a3d84832bfc6867647d3581b0052f3
--
2.37.1
next reply other threads:[~2026-05-08 2:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 2:28 Richard Zhu [this message]
2026-05-08 16:03 ` [PATCH v1] arm64: dts: imx95: Increase PCIe outbound address space to 2GB Frank Li
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