From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4383CD484D for ; Mon, 11 May 2026 18:21:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To: Content-Transfer-Encoding:Content-Type:MIME-Version:Message-Id:Date:Subject: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=6tigUdPrbG9NI4AkoRhKDgvIRKJoKd3hQFHhMLAh0Ac=; b=2mHjbxuhRNFsaF fPd9kBn0m1jh+G9kM+7+wZVOoDYGqYRvbhZAv7zC5dczASbOpxrSzJJfrb56ZsRm/R/UZGNIaxIyY Zi2wKmIBpWi7btPsz5RHs6sy0QNuYX+Ca7kp/y2RfzxQiRx7LU7inKtlxFdWb4GUHAf+WVUU4JXCE 4INjFofZYInD5hEggpExYt6Uep3mfYwIPKTLYZNrwR3Ixjtk7xSubYxSeD6A2O+a7MGXAwhHP88C5 7/2n92Ew49Nz4LkVqqQGL5rVDCo8snNBv3o4XLt3sODDB0IBV0yzDYE9PF+aSUl1GZMl0pbHxZktA pMsADcqhL+/QVmd8VkDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMVFx-0000000ETuB-01fa; Mon, 11 May 2026 18:21:29 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMVFt-0000000ETqs-17zk; Mon, 11 May 2026 18:21:27 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1778523680; bh=QlHRn1HXjDNwINNOyiiCfFBAmz9XFP0jXQyyV/BKpzg=; h=From:Subject:Date:To:Cc:From; b=cXeKiJmfuduU4ZQDt2mRglV28CEYSQoUK5XGrSOc8JAkoWg+OlDJaff8fz7QbSQHE J8/G1NzfY+NbM31r21oFgCjaYWcx36pVYyzXlV2oDVtF2ay6aXYyzBlArIm6EJiaky 9z6YNBrkL6XxYlJwRmHNouQovV5GugsmpgTAJBmOPV1kKwJFuVzH/g9Jxg3Me3dwkK wIH1rW/8l3cECNMud2F4mYRfSfffO24w7RffJ/gSmUG2gruPJGxSQ5VhcpCOx0jNA9 TrlvMUMZXa0xQ8K1N2MFgQwJXcppRLNygv/OEGYhK1FoZ/8lk9Z6emunWdDgJvssiq XyLsbsBToXG4Q== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 9240F17E05FC; Mon, 11 May 2026 20:21:20 +0200 (CEST) From: Cristian Ciocaltea Subject: [PATCH v2 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Date: Mon, 11 May 2026 21:21:14 +0300 Message-Id: <20260511-hdptx-clk-fixes-v2-0-664e41379cab@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAAAAAAC/3WNyw7CIBREf6W5a6+h1wZaV/6H6QJ5CLGWBhpS0 /DvYvcuz0zOzA7JRG8SXJsdosk++TBXoFMDysn5adDrykCMOCMS6PSybqimF1q/mYSd6IjzC9m eE1RrieYoqnQfKzuf1hA/x0Fuf+n/rdwiQzsMvSXBSTN7U2Ga5CNEeVbhDWMp5QscxNdasgAAA A== X-Change-ID: 20260227-hdptx-clk-fixes-47426632f862 To: Vinod Koul , Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Thomas_Niederpr=C3=BCm?= , Simon Wright X-Mailer: b4 0.15.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260511_112125_504780_0A0E2E91 X-CRM114-Status: UNSURE ( 9.43 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series provides a set of bug fixes and cleanups for the Rockchip Samsung HDPTX PHY driver. The first part of the series (i.e. PATCH 1 & 2) addresses clock rate calculation and synchronization issues. Specifically, it fixes edge cases where the PHY PLL is pre-programmed by an external component (like a bootloader) or when changing the color depth (bpc) while keeping the modeline constant. Because the Common Clock Framework .set_rate() callback might not be invoked if the pixel clock remains unchanged, this previously led to out-of-sync states between CCF and the actual HDMI PHY configuration. The second part focuses on code cleanups and modernizing the register access. Now that dw_hdmi_qp driver has fully switched to using phy_configure(), we can drop the deprecated TMDS rate setup workarounds and the restrict_rate_change flag logic. Finally, it refactors the driver to consistently use standard bitfield macros. Signed-off-by: Cristian Ciocaltea --- Changes in v2: - Collected Tested-by tags from Thomas and Simon - Fixed a typo in commit description of patch 1 - Added a comment in patch 2 explaining why PLL config errors are ignored for rk_hdptx_phy_consumer_get() - Added a missed FIELD_GET conversion for lcpll_hw.pms_sdiv in patch 6 - Rebased onto latest phy/fixes - Link to v1: https://lore.kernel.org/r/20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com --- Cristian Ciocaltea (6): phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() phy: rockchip: samsung-hdptx: Consistently use bitfield macros drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 216 ++++++++++------------ 1 file changed, 95 insertions(+), 121 deletions(-) --- base-commit: a4058c09dd6e28ec33316fd6eb45ddae4cab1f31 change-id: 20260227-hdptx-clk-fixes-47426632f862