From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64168CD4851 for ; Wed, 13 May 2026 13:20:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=s/8JYG1r220Ay2buk7R8Z96kuE+ZAB5XpfMNAN2aWb8=; b=OFh4yee1Pd/OYh8kN8LWCq/vmy ry/YMrVVxaBZUY9F5r4KaccXUKWUfZJT4RzSGVyFVDsPaUFeTuJkkHmBTMbY39XpgXKdSKC0Je93O KLgngIhC8PXtl0uV9grVVRvHCdqiLLZrBI+egG8UQV6zKRflaiPjs8LMJ8VGXx4ddH3rpb1ap5CoJ QLb8aaOCDfmiodU0MvM1zdRkmuscDZi5x+9RSDUIMiRICmCpaQGEwIEt4gu6HGfp4ZXdHJ3SyK8b2 bZ4SPx2h8E06aKOoqqn5mOsuPRXGY9ZorrPGkhPNyMGWT5Je5WMPxTZD+CQ9BFxT6lhBxjryd8r8L 1JQD16Ew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wN9Vk-00000002gPi-2xtf; Wed, 13 May 2026 13:20:28 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wN9VY-00000002g85-30fk for linux-arm-kernel@lists.infradead.org; Wed, 13 May 2026 13:20:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 58D972381; Wed, 13 May 2026 06:20:10 -0700 (PDT) Received: from e122027.arm.com (unknown [10.57.68.187]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 943BB3F836; Wed, 13 May 2026 06:20:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778678415; bh=Wl2koRsICWJIki660jOXAnqWPnsvIwI4l+81fOMk+vk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JVdmJEQ69knz0LhLah++wn0pn9weglxXJkm+MaK/UII8mKAe5qJVgbB9ay/5UKCxE /WGWYhbmnTzhBIGRZKt3BzyuL56NJwFhOuvpAj13VL0Fa/4PLUC3EZ+cwYhCUZrE+S dDUPKU30y28St9zWqGwfTg7Yn96t3ihSGZ6NIwYE= From: Steven Price To: kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Steven Price , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Gavin Shan , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" , Emi Kisanuki , Vishal Annapurve , WeiLin.Chang@arm.com, Lorenzo.Pieralisi2@arm.com Subject: [PATCH v14 21/44] KVM: arm64: Support timers in realm RECs Date: Wed, 13 May 2026 14:17:29 +0100 Message-ID: <20260513131757.116630-22-steven.price@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260513131757.116630-1-steven.price@arm.com> References: <20260513131757.116630-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260513_062016_878436_6694BC36 X-CRM114-Status: GOOD ( 20.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The RMM keeps track of the timer while the realm REC is running, but on exit to the normal world KVM is responsible for handling the timers. A later patch adds the support for propagating the timer values from the exit data structure and calling kvm_realm_timers_update(). Signed-off-by: Steven Price --- Changes since v12: * Adapt to upstream changes. Changes since v11: * Drop the kvm_is_realm() check from timer_set_offset(). We already ensure that the offset is 0 when calling the function. Changes since v10: * KVM_CAP_COUNTER_OFFSET is now already hidden by a previous patch. Changes since v9: * No need to move the call to kvm_timer_unblocking() in kvm_timer_vcpu_load(). Changes since v7: * Hide KVM_CAP_COUNTER_OFFSET for realm guests. --- arch/arm64/kvm/arch_timer.c | 28 +++++++++++++++++++++++++--- include/kvm/arm_arch_timer.h | 2 ++ 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c index cbea4d9ee955..88ed01edc136 100644 --- a/arch/arm64/kvm/arch_timer.c +++ b/arch/arm64/kvm/arch_timer.c @@ -470,6 +470,21 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, timer_ctx); } +void kvm_realm_timers_update(struct kvm_vcpu *vcpu) +{ + struct arch_timer_cpu *arch_timer = &vcpu->arch.timer_cpu; + int i; + + for (i = 0; i < NR_KVM_EL0_TIMERS; i++) { + struct arch_timer_context *timer = &arch_timer->timers[i]; + bool status = timer_get_ctl(timer) & ARCH_TIMER_CTRL_IT_STAT; + bool level = kvm_timer_irq_can_fire(timer) && status; + + if (level != timer->irq.level) + kvm_timer_update_irq(vcpu, level, timer); + } +} + /* Only called for a fully emulated timer */ static void timer_emulate(struct arch_timer_context *ctx) { @@ -1079,7 +1094,7 @@ static void timer_context_init(struct kvm_vcpu *vcpu, int timerid) ctxt->timer_id = timerid; - if (!kvm_vm_is_protected(vcpu->kvm)) { + if (!kvm_vm_is_protected(vcpu->kvm) && !kvm_is_realm(vcpu->kvm)) { if (timerid == TIMER_VTIMER) ctxt->offset.vm_offset = &kvm->arch.timer_data.voffset; else @@ -1110,7 +1125,7 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) timer_context_init(vcpu, i); /* Synchronize offsets across timers of a VM if not already provided */ - if (!vcpu_is_protected(vcpu) && + if (!vcpu_is_protected(vcpu) && !kvm_is_realm(vcpu->kvm) && !test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags)) { timer_set_offset(vcpu_vtimer(vcpu), kvm_phys_timer_read()); timer_set_offset(vcpu_ptimer(vcpu), 0); @@ -1611,6 +1626,13 @@ int kvm_timer_enable(struct kvm_vcpu *vcpu) return -EINVAL; } + /* + * We don't use mapped IRQs for Realms because the RMI doesn't allow + * us setting the LR.HW bit in the VGIC. + */ + if (vcpu_is_rec(vcpu)) + return 0; + get_timer_map(vcpu, &map); ops = vgic_is_v5(vcpu->kvm) ? &arch_timer_irq_ops_vgic_v5 : @@ -1740,7 +1762,7 @@ int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm, if (offset->reserved) return -EINVAL; - if (kvm_vm_is_protected(kvm)) + if (kvm_vm_is_protected(kvm) || kvm_is_realm(kvm)) return -EINVAL; mutex_lock(&kvm->lock); diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h index bf8cc9589bd0..ffdb90dcad58 100644 --- a/include/kvm/arm_arch_timer.h +++ b/include/kvm/arm_arch_timer.h @@ -113,6 +113,8 @@ int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); +void kvm_realm_timers_update(struct kvm_vcpu *vcpu); + u64 kvm_phys_timer_read(void); void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu); -- 2.43.0