From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC8BECD5BB5 for ; Thu, 21 May 2026 13:26:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OivqZibag75srO7648KodSDvyK0P11e2wQ8Gb0G4W0c=; b=iQH83iC4LW925a8isTzLB8BxK4 x8eRgz8AST0Cry5Yq4WjkjbXiTlGWihhF+z7yOFm9pOogqnT2O/bi6dgpRCJZ00ffUTjt6JVrSKdZ /DTNp7vOOHnLLLw2Qd6mfzcG/0c0VG3jduBSLnC/BdtSrDcBKl9vDVSTRLUEUy/PrqL0lNDyVziEr Uf35s0tQnKyp2giS5mvQ4hz6j29uVDzd7e3bF9I9O0Xj5cp8dOwIsa6A2mU/YfyM+WsTUiBvzZuOd hy5NKUMUbxsWKep5JqPUFRL0l/qRN6uMkNMqZKLJJ0k8DRdqWjxA7qWv/AfPwb6NuDmVwcJIaeioc Ho3LDxXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQ3Q7-00000007s9i-2Dsk; Thu, 21 May 2026 13:26:39 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQ3Pt-00000007ryl-3ixA for linux-arm-kernel@lists.infradead.org; Thu, 21 May 2026 13:26:27 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 44C9D1C00; Thu, 21 May 2026 06:26:20 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2D8B53F7B4; Thu, 21 May 2026 06:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779369985; bh=qIZr5ljPbLNWNuTkd5WQy/hMxtaJqp3POPsZmgXCn6w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CtIJgnmDWAteDtPEwvz66unfs626iUOdWLwfFndMb3yqzNeTHTjrZ+RHTb4CPQA+F C9nWYRjj9sQy+1mHAnIdYNr+u8hNta4w6cy9xoKXS+TxDv2YtRTAHoNvQs9vpl0WCS ou2FoDubJUEDgLChwlU61tx2Tcl5iYmr8Vla+GEo= From: Mark Rutland To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: broonie@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, mark.rutland@arm.com, maz@kernel.org, oupton@kernel.org, tabba@google.com, will@kernel.org Subject: [PATCH 09/18] arm64: fpsimd: Move sve_get_vl() and sme_get_vl() inline Date: Thu, 21 May 2026 14:25:47 +0100 Message-Id: <20260521132556.584676-10-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20260521132556.584676-1-mark.rutland@arm.com> References: <20260521132556.584676-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260521_062626_006684_D59C692E X-CRM114-Status: GOOD ( 12.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The sve_get_vl() and sme_get_vl() functions are wrappers for the RDVL and RDSVL instructions respectively. There's no need for those to be out-of-line. Replace the out-of-line assembly functions with equivalent inline functions. The _sve_rdvl assembly macro is unused, and so it is removed. The _sme_rdsvl assembly macro is still used elsewhere, and so is kept for now. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Fuad Tabba Cc: James Morse Cc: Marc Zyngier Cc: Mark Brown Cc: Oliver Upton Cc: Will Deacon --- arch/arm64/include/asm/fpsimd.h | 31 +++++++++++++++++++++++++-- arch/arm64/include/asm/fpsimdmacros.h | 6 ------ arch/arm64/kernel/entry-fpsimd.S | 10 --------- 3 files changed, 29 insertions(+), 18 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 8efa3c0402a7a..36cf528e64971 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -22,6 +22,9 @@ #include #include +#define __SVE_PREAMBLE ".arch_extension sve\n" +#define __SME_PREAMBLE ".arch_extension sme\n" + /* Masks for extracting the FPSR and FPCR from the FPSCR */ #define VFP_FPSCR_STAT_MASK 0xf800009f #define VFP_FPSCR_CTRL_MASK 0x07f79f00 @@ -141,11 +144,23 @@ static inline void *thread_zt_state(struct thread_struct *thread) return thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq); } +static inline unsigned int sve_get_vl(void) +{ + unsigned int vl; + + asm volatile( + __SVE_PREAMBLE + " rdvl %x[vl], #1\n" + : [vl] "=r" (vl) + ); + + return vl; +} + extern void sve_save_state(void *state, u32 *pfpsr, int save_ffr); extern void sve_load_state(void const *state, u32 const *pfpsr, int restore_ffr); extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1); -extern unsigned int sve_get_vl(void); extern void sme_save_state(void *state, int zt); extern void sme_load_state(void const *state, int zt); @@ -400,8 +415,20 @@ static inline int sme_max_virtualisable_vl(void) return vec_max_virtualisable_vl(ARM64_VEC_SME); } +static inline unsigned int sme_get_vl(void) +{ + unsigned int vl; + + asm volatile( + __SME_PREAMBLE + " rdsvl %x[vl], #1\n" + : [vl] "=r" (vl) + ); + + return vl; +} + extern void sme_alloc(struct task_struct *task, bool flush); -extern unsigned int sme_get_vl(void); extern int sme_set_current_vl(unsigned long arg); extern int sme_get_current_vl(void); extern void sme_suspend_exit(void); diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index d0bdbbf2d44ad..d75c9d4c9989b 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -125,12 +125,6 @@ ldr p\np, [x\nxbase, #\offset, MUL VL] .endm -/* RDVL X\nx, #\imm */ -.macro _sve_rdvl nx, imm - .arch_extension sve - rdvl x\nx, #\imm -.endm - /* RDFFR (unpredicated): RDFFR P\np.B */ .macro _sve_rdffr np .arch_extension sve diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 88c555745b584..7f2d31dff8c17 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -57,11 +57,6 @@ SYM_FUNC_START(sve_load_state) ret SYM_FUNC_END(sve_load_state) -SYM_FUNC_START(sve_get_vl) - _sve_rdvl 0, 1 - ret -SYM_FUNC_END(sve_get_vl) - /* * Zero all SVE registers but the first 128-bits of each vector * @@ -84,11 +79,6 @@ SYM_FUNC_END(sve_flush_live) #ifdef CONFIG_ARM64_SME -SYM_FUNC_START(sme_get_vl) - _sme_rdsvl 0, 1 - ret -SYM_FUNC_END(sme_get_vl) - /* * Save the ZA and ZT state * -- 2.30.2