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Fri, 22 May 2026 00:24:50 -0500 From: Aksh Garg To: , , , , , , , , , , CC: , , , , , Subject: [PATCH v4 3/4] PCI: endpoint: Add support for DOE initialization and setup in EPC core Date: Fri, 22 May 2026 10:54:33 +0530 Message-ID: <20260522052434.802034-4-a-garg7@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260522052434.802034-1-a-garg7@ti.com> References: <20260522052434.802034-1-a-garg7@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003445:EE_|MN2PR10MB4400:EE_ X-MS-Office365-Filtering-Correlation-Id: 3377759a-ca0f-480d-5e19-08deb7c275c3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|7416014|1800799024|921020|18002099003|56012099003|22082099003|5023799004|6133799003; X-Microsoft-Antispam-Message-Info: fp0xe8681MXLvMA7iRaglZr/DmbZPdbjJ+tPbvepdI9cY/PlP1bXTSXGSAX9EZFuXhX6KSUbNH5r8VabLuCzFeCK2NiCl1mLOhIEWJbbrGG7XwGM4QC8noEFjpvpJHEuSFj8UNjquXq4lgjfASDeyS1uUQvC0CS6vqLmyS247iM4OIKmHOm9IuCrN/03IhsJmkPygCVEiXSlv6Bv9HKDAoyr7R1+eWbdQV+QjtJp4/oi4nQ+u5NNssv5FaxfB3x0mAsnJX0MMIOgRaxKc2I2sEmbi0ig93SHVc3BScnDR3i03ENyGEetJspDbj9sqEwicFDdcdW5e8FKihmF8sza87GtYCuXp+ywTLaIz66rJCfLl8gLpBBOC/HvC9qkvOUI1aw30KpENsV0zMVIMLtmDeCkXjGNInK1m1G+tqVTU7rzYbbeYiAFPpwR2WzYhU7GgBrTBYcC622An6coDZf1Epy9L7RMQQpWoRKKORWrhSb+TBckhf0x5XpGNeV8gwFK3Crq4glH6GtoDjz1RBEIDcMdDXPU+w3GLqJJR5dK7Mg/HQAYs8z9h7/0hgCxdd1ulEbXJEqCc03EatgIFVDN4IWMTYm4xh2cwbEGZx0NT0Uc7hgIIP3Jo4xOZnD5rTQIF9OTAR16pP1HouyYUu3m5k0JogaKKBQU4b9oR9+GaDW9UnHCJtQ9tFAd1Ueo9wWlKMoOIozc4GNTujf8VSZbvhU4a3bvR2ZhpdYES1XmIxfSgdn6WEChHIi+ZL/Q3BVqRRAOoCQmfcKUswHCsA4+QOngXWgeAmpFnSUypz3vjlQ= X-Forefront-Antispam-Report: CIP:198.47.21.194;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:flwvzet200.ext.ti.com;PTR:ErrorRetry;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(7416014)(1800799024)(921020)(18002099003)(56012099003)(22082099003)(5023799004)(6133799003);DIR:OUT;SFP:1101; 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This calls pci_epc_doe_setup() to setup the DOE framework for an endpoint controller, which discovers the DOE capabilities (extended capability ID 0x2E), and registers each discovered DOE mailbox for all the functions in the endpoint controller. Add pci_epc_deinit_capabilities() in EPC core driver for cleanup of the resources used by the capabilities of the EPC driver. This calls pci_ep_doe_destroy() to destroy all DOE mailboxes and free associated resources. Co-developed-by: Siddharth Vadapalli Signed-off-by: Siddharth Vadapalli Signed-off-by: Aksh Garg --- Changes from v3 to v4: - Call DOE setup and destroy APIs directly within the EPC core, instead of relying on the EPC drivers to call them individually. EPC drivers do not need to explicitly handle DOE setup, rather the EPC core manages this transparently. (Suggested by Manivannan Sadhasivam). - Removed pci_epc_doe_destroy() API, which was just calling pci_ep_doe_destroy(). Instead, called pci_ep_doe_destroy() directly during cleanup. - Called pci_ep_doe_init() before the "!epc->ops->find_ext_capability" check, because if doe-capable=1 and find_ext_capability() op is undefined, this would not initialize the epc->doe_mbs xarray. However during cleanup, the check "!epc->ops->find_ext_capability" would be unnecessary, and it will try to destroy the epc->doe_mbs xarray even when it was not initialized. Changes from v2 to v3: - Rebased on 7.1-rc1. Changes since v1: - New patch added to v2 (not present in v1) v3: https://lore.kernel.org/all/20260427051725.223704-4-a-garg7@ti.com/ v2: https://lore.kernel.org/all/20260401073022.215805-4-a-garg7@ti.com/ This patch is introduced based on the feedback provided by Manivannan Sadhasivam at [1]. [1]: https://lore.kernel.org/all/p57x6jleaim5w7t2k3v7tioujnaxuovfpj5euop5ogefvw23se@y5fw3che5p5d/ drivers/pci/endpoint/pci-epc-core.c | 92 +++++++++++++++++++++++++++++ include/linux/pci-epc.h | 6 ++ 2 files changed, 98 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 6c3c58185fc5..af7889b541c0 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -14,6 +14,8 @@ #include #include +#include "../pci.h" + static const struct class pci_epc_class = { .name = "pci_epc", }; @@ -842,6 +844,71 @@ void pci_epc_linkdown(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkdown); +/** + * pci_epc_doe_setup() - Discover and setup DOE mailboxes for all functions + * @epc: the EPC device on which DOE mailboxes has to be setup + * + * Discover DOE (Data Object Exchange) capabilities for all physical functions + * in the endpoint controller and register DOE mailboxes. + * + * Returns: 0 on success, -errno on failure + */ +static int pci_epc_doe_setup(struct pci_epc *epc) +{ + u16 cap_offset = 0; + u8 func_no; + int ret; + + if (!epc->ops || !epc->ops->find_ext_capability) + return -EINVAL; + + /* Discover DOE capabilities for all functions */ + for (func_no = 0; func_no < epc->max_functions; func_no++) { + while ((cap_offset = epc->ops->find_ext_capability(epc, func_no, 0, + cap_offset, + PCI_EXT_CAP_ID_DOE))) { + /* Register this DOE mailbox */ + ret = pci_ep_doe_add_mailbox(epc, func_no, cap_offset); + if (ret) { + dev_warn(&epc->dev, + "[pf%d:offset %x] failed to add DOE mailbox\n", + func_no, cap_offset); + } + } + } + + dev_dbg(&epc->dev, "DOE mailboxes setup complete\n"); + return 0; +} + +/** + * pci_epc_init_capabilities() - Initialize EPC capabilities + * @epc: the EPC device whose capabilities need to be initialized + * + * Invoke to initialize capabilities supported by the EPC device. + */ +static void pci_epc_init_capabilities(struct pci_epc *epc) +{ + const struct pci_epc_features *epc_features; + int ret; + + epc_features = pci_epc_get_features(epc, 0, 0); + if (!epc_features) + return; + + if (IS_ENABLED(CONFIG_PCI_ENDPOINT_DOE) && epc_features->doe_capable) { + ret = pci_ep_doe_init(epc); + if (ret) { + dev_warn(&epc->dev, "DOE initialization failed: %d\n", ret); + return; + } + + ret = pci_epc_doe_setup(epc); + if (ret) + dev_warn(&epc->dev, "DOE setup failed: %d\n", ret); + } +} + /** * pci_epc_init_notify() - Notify the EPF device that EPC device initialization * is completed. @@ -857,6 +924,8 @@ void pci_epc_init_notify(struct pci_epc *epc) if (IS_ERR_OR_NULL(epc)) return; + pci_epc_init_capabilities(epc); + mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); @@ -890,6 +959,27 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) } EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); +/** + * pci_epc_deinit_capabilities() - Cleanup EPC capabilities + * @epc: the EPC device whose capabilities need to be cleaned up + * + * Invoke to cleanup capabilities supported by the EPC device, + * and free the associated resources. + */ +static void pci_epc_deinit_capabilities(struct pci_epc *epc) +{ + const struct pci_epc_features *epc_features; + + epc_features = pci_epc_get_features(epc, 0, 0); + if (!epc_features) + return; + + if (IS_ENABLED(CONFIG_PCI_ENDPOINT_DOE) && epc_features->doe_capable) { + pci_ep_doe_destroy(epc); + dev_dbg(&epc->dev, "DOE mailboxes destroyed\n"); + } +} + /** * pci_epc_deinit_notify() - Notify the EPF device about EPC deinitialization * @epc: the EPC device whose deinitialization is completed @@ -903,6 +993,8 @@ void pci_epc_deinit_notify(struct pci_epc *epc) if (IS_ERR_OR_NULL(epc)) return; + pci_epc_deinit_capabilities(epc); + mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index dd26294c8175..11474e337db3 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -84,6 +84,8 @@ struct pci_epc_map { * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC + * @find_ext_capability: ops to find extended capability offset for a function + * in endpoint controller * @owner: the module owner containing the ops */ struct pci_epc_ops { @@ -115,6 +117,8 @@ struct pci_epc_ops { void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); + u16 (*find_ext_capability)(struct pci_epc *epc, u8 func_no, + u8 vfunc_no, u16 start, u8 cap); struct module *owner; }; @@ -270,6 +274,7 @@ struct pci_epc_bar_desc { * @msi_capable: indicate if the endpoint function has MSI capability * @msix_capable: indicate if the endpoint function has MSI-X capability * @intx_capable: indicate if the endpoint can raise INTx interrupts + * @doe_capable: indicate if the endpoint function has DOE capability * @bar: array specifying the hardware description for each BAR * @align: alignment size required for BAR buffer allocation */ @@ -280,6 +285,7 @@ struct pci_epc_features { unsigned int msi_capable : 1; unsigned int msix_capable : 1; unsigned int intx_capable : 1; + unsigned int doe_capable : 1; struct pci_epc_bar_desc bar[PCI_STD_NUM_BARS]; size_t align; }; -- 2.34.1