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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: gk9tLZbWW/6bDJ/4lUjt2ZU9yn/uSE4Dm/cnARrc3kxb1+5SS/D7bNOOgdcWRr3XCZtKreD9vN8FCXICl2xHRwhXdBcKDN5PmMBv3iSNVlM9dFFQzPhm6yV8e/hQaBU6JOiU64hKvg+opsjjqOQ8J8+/dWaj2pbFi92CLaeANKx4GTtzmjDPJg/gfGlvrda61Ikavjc3oGJnUrrtnnMLMePJPGjtUIDpmhAnDGTyXdPws/WNalJdKdoydSsA3LN5v3gP2lFvWUXszdX8WGGE3L69tVyYzLyOmH0/DR1Jra9Pq8SgjJtTvDJO80PWmY3OeqxtcTEiA2to5efq7fYg1A1wwgfh+xuDj4hpTcO2HDop362h7DF+qq4oiK88tXnvd7tuiwlaXXziR0z+WxV48BiHr6/+zVoh7yYWbZ09dlE2iboBpfnl0Ga3LLWny8Pm X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 May 2026 09:26:52.6478 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2d53bf13-e14e-459e-c976-08debb08ec08 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.59];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF0001C714.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR10MB5504 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260526_022702_638162_6DC5FA61 X-CRM114-Status: GOOD ( 11.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The bootph-all flag was introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be present in all boot stages, so add missing bootph-all phase flag to these nodes to support SD boot. Signed-off-by: Patrice Chotard --- arch/arm64/boot/dts/st/stm32mp211.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp215f-dk.dts | 29 ++++++++ arch/arm64/boot/dts/st/stm32mp231.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp235f-dk.dts | 95 ++++++++++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp255.dtsi | 2 +- arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 103 ++++++++++++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 105 +++++++++++++++++++++++++++++ 8 files changed, 339 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi index 4bfd58b26b51..a79c056fdfb1 100644 --- a/arch/arm64/boot/dts/st/stm32mp211.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi @@ -47,7 +47,7 @@ ck_flexgen_51: clock-200000000 { }; firmware { - optee { + optee: optee { compatible = "linaro,optee-tz"; method = "smc"; }; @@ -70,7 +70,7 @@ scmi_reset: protocol@16 { }; }; - psci { + psci: psci { compatible = "arm,psci-1.0"; method = "smc"; }; diff --git a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts index a1285abc80ca..100f787168d6 100644 --- a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts @@ -48,6 +48,35 @@ &bsec { bootph-all; }; +&optee { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + +&scmi_reset { + bootph-all; +}; + +&syscfg { + bootph-all; +}; + &usart2 { + bootph-all; status = "okay"; }; diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi index 9e1d240888ff..8942a5a29a1c 100644 --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi @@ -65,7 +65,7 @@ optee: optee { interrupts = ; }; - scmi { + scmi: scmi { compatible = "linaro,scmi-optee"; #address-cells = <1>; #size-cells = <0>; @@ -117,7 +117,7 @@ scmi_vdda18adc: regulator@7 { }; }; - psci { + psci: psci { compatible = "arm,psci-1.0"; method = "smc"; diff --git a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts index dd4efbe5a46e..0608b978cbe5 100644 --- a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts @@ -131,6 +131,10 @@ &arm_wdt { status = "okay"; }; +&bsec { + bootph-all; +}; + ðernet1 { pinctrl-0 = <ð1_rgmii_pins_b>; pinctrl-1 = <ð1_rgmii_sleep_pins_b>; @@ -153,6 +157,46 @@ phy1_eth1: ethernet-phy@1 { }; }; +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + &i2c2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_pins_b>; @@ -219,6 +263,38 @@ lvds_out0: endpoint { }; }; +&optee { + bootph-all; +}; + +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt = <1800000>; @@ -258,6 +334,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>; @@ -272,12 +352,27 @@ &sdmmc1 { status = "okay"; }; +&syscfg { + bootph-all; +}; + &usart2 { pinctrl-names = "default", "idle", "sleep"; pinctrl-0 = <&usart2_pins_a>; pinctrl-1 = <&usart2_idle_pins_a>; pinctrl-2 = <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status = "okay"; }; + +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 673fbc5632e6..190877cec012 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -68,7 +68,7 @@ optee: optee { interrupts = ; }; - scmi { + scmi: scmi { compatible = "linaro,scmi-optee"; #address-cells = <1>; #size-cells = <0>; @@ -139,7 +139,7 @@ v2m0: v2m@48090000 { }; }; - psci { + psci: psci { compatible = "arm,psci-1.0"; method = "smc"; diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi index 7a598f53a2a0..3ba4e6166586 100644 --- a/arch/arm64/boot/dts/st/stm32mp255.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi @@ -40,4 +40,4 @@ venc: venc@480e0000 { clocks = <&rcc CK_BUS_VENC>; access-controllers = <&rifsc 90>; }; -}; \ No newline at end of file +}; diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts index 8daf3dfd5133..7e0b6502467e 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts @@ -138,6 +138,10 @@ &arm_wdt { status = "okay"; }; +&bsec { + bootph-all; +}; + ðernet1 { pinctrl-0 = <ð1_rgmii_pins_b>; pinctrl-1 = <ð1_rgmii_sleep_pins_b>; @@ -160,6 +164,54 @@ phy1_eth1: ethernet-phy@1 { }; }; +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioj { + bootph-all; +}; + +&gpiok { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + &i2c2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_pins_b>; @@ -226,6 +278,38 @@ lvds_out0: endpoint { }; }; +&optee { + bootph-all; +}; + +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt = <1800000>; @@ -265,6 +349,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>; @@ -279,12 +367,27 @@ &sdmmc1 { status = "okay"; }; +&syscfg { + bootph-all; +}; + &usart2 { pinctrl-names = "default", "idle", "sleep"; pinctrl-0 = <&usart2_pins_a>; pinctrl-1 = <&usart2_idle_pins_a>; pinctrl-2 = <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status = "okay"; }; + +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 14e033f365e3..dab54742e01c 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -167,6 +167,10 @@ &arm_wdt { status = "okay"; }; +&bsec { + bootph-all; +}; + &combophy { clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>; clock-names = "apb", "ker", "pad"; @@ -253,6 +257,54 @@ phy0_eth2: ethernet-phy@1 { }; }; +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioj { + bootph-all; +}; + +&gpiok { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + &i2c2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_pins_a>; @@ -344,6 +396,7 @@ timer { }; <dc { + bootph-all; status = "okay"; port { ltdc_ep0_out: endpoint { @@ -353,6 +406,7 @@ ltdc_ep0_out: endpoint { }; &lvds { + bootph-all; status = "okay"; ports { #address-cells = <1>; @@ -374,6 +428,10 @@ lvds_out0: endpoint { }; }; +&optee { + bootph-all; +}; + &pcie_ep { pinctrl-names = "default", "init"; pinctrl-0 = <&pcie_pins_a>; @@ -395,10 +453,38 @@ pcie@0,0 { }; }; +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + &rtc { status = "okay"; }; +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt = <1800000>; @@ -430,6 +516,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>; @@ -444,6 +534,10 @@ &sdmmc1 { status = "okay"; }; +&syscfg { + bootph-all; +}; + &spi3 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi3_pins_a>; @@ -521,11 +615,22 @@ &usart2 { pinctrl-0 = <&usart2_pins_a>; pinctrl-1 = <&usart2_idle_pins_a>; pinctrl-2 = <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status = "okay"; }; +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; + &usart6 { pinctrl-names = "default", "idle", "sleep"; pinctrl-0 = <&usart6_pins_a>; -- 2.43.0