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Fri, 29 May 2026 04:12:21 -0700 (PDT) Date: Fri, 29 May 2026 11:12:06 +0000 In-Reply-To: <20260529111208.387412-1-praan@google.com> Mime-Version: 1.0 References: <20260529111208.387412-1-praan@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529111208.387412-5-praan@google.com> Subject: [PATCH v6 4/6] iommu/arm-smmu-v3: Standardize ATS enablement failure reporting From: Pranjal Shrivastava To: iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Bjorn Helgaas , David Woodhouse , Lu Baolu , Robin Murphy , Suravee Suthikulpanit , Jason Gunthorpe , Nicolin Chen , David Matlack , Samiullah Khawaja , Daniel Mentz , Pasha Tatashin , Mostafa Saleh , Pranjal Shrivastava Content-Type: text/plain; charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260529_041223_399798_13FDD4C2 X-CRM114-Status: GOOD ( 15.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SMMUv3 driver currently has a two-phase commit in its ATS enablement flow. During arm_smmu_attach_prepare(), it predicts whether ATS will be enabled using arm_smmu_ats_supported() and accordingly increments nr_ats_masters and merges ATS invalidations into the domain's invs array. However, the actual hardware enablement via pci_enable_ats() happens later in arm_smmu_attach_commit(). If this call to pci_enable_ats fails, the SMMU driver's ATS state tracking remains polluted, i.e., the driver tracks ATS as enabled on a master that is not actually using it. This leads to an incorrect nr_ats_masters and triggers a warning in the PCI core during detach: 1 [ 127.925080] ------------[ cut here ]------------ 2 [ 127.925084] WARNING: drivers/pci/ats.c:132 at pci_disable_ats+0x94/0xa8 3 ... 4 [ 128.068169] Call trace: 5 [ 128.070603] pci_disable_ats+0x94/0xa8 (P) 6 [ 128.074688] arm_smmu_attach_prepare+0x104/0x310 7 [ 128.079292] arm_smmu_attach_dev_ste+0x128/0x1e0 The issue was exposed under heavy load when running a VFIO-based DMA map stress test (iova_stress). Following the addition of the arm_smmu_master_prepare_ats() [1] helper during device probe, failable ATS configuration (STU setup) is now handled early during probe. This ensures that any master reaching the attach phase is guaranteed to have a valid ATS configuration. Update arm_smmu_enable_ats() to use the WARN() macro for any subsequent enablement failures during the commit phase. Since probe checks now preclude software configuration errors, any failure here is considered a kernel bug. [1] https://lore.kernel.org/all/cover.1779392420.git.nicolinc@nvidia.com/ Signed-off-by: Pranjal Shrivastava --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index a10affb483a4..aaebd72bc48d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2956,8 +2956,14 @@ static void arm_smmu_enable_ats(struct arm_smmu_master *master) * ATC invalidation of PASID 0 causes the entire ATC to be flushed. */ arm_smmu_atc_inv_master(master, IOMMU_NO_PASID); - if (pci_enable_ats(pdev, stu)) - dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu); + + /* + * Any failure at this point is a kernel bug. pci_ats_supported() + * and pci_prepare_ats() have already verified the hardware capability + * and programmed the STU. Thus, pci_enable_ats() should not fail here. + */ + WARN(pci_enable_ats(pdev, stu), + "Failed to enable ATS (STU %zu)\n", stu); } static int arm_smmu_enable_pasid(struct arm_smmu_master *master) -- 2.54.0.823.g6e5bcc1fc9-goog