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Wed, 10 Jun 2026 08:30:55 +0000 (GMT) Received: from osiris (unknown [9.224.76.185]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTPS; Wed, 10 Jun 2026 08:30:55 +0000 (GMT) Date: Wed, 10 Jun 2026 10:30:54 +0200 From: Steffen Eiden To: Janosch Frank Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, Alexander Gordeev , Andreas Grapentin , Arnd Bergmann , Catalin Marinas , Christian Borntraeger , Claudio Imbrenda , David Hildenbrand , Friedrich Welter , Gautam Gala , Hariharan Mari , Heiko Carstens , Hendrik Brueckner , Ilya Leoshkevich , Joey Gouly , Marc Zyngier , Nico Boehr , Nina Schoetterl-Glausch , Oliver Upton , Paolo Bonzini , Suzuki K Poulose , Sven Schnelle , Ulrich Weigand , Vasily Gorbik , Will Deacon , Zenghui Yu Subject: Re: [PATCH v1 13/26] s390: Introduce read/write ARM sysreg instructions Message-ID: <20260610083054.151573-A-seiden@linux.ibm.com> References: <20260529155601.2927240-1-seiden@linux.ibm.com> <20260529155601.2927240-14-seiden@linux.ibm.com> <2d73aca5-1858-4a7a-a304-0971e4789dc1@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2d73aca5-1858-4a7a-a304-0971e4789dc1@linux.ibm.com> X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=N4UZ0W9B c=1 sm=1 tr=0 ts=6a2920c7 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=kj9zAlcOel0A:10 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=RB1mEpRu8beSFINCoVEA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-ORIG-GUID: rkH4BTGK461Si0Q9cLKjWcrqdRB9jrQ0 X-Proofpoint-GUID: rkH4BTGK461Si0Q9cLKjWcrqdRB9jrQ0 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjEwMDA3NSBTYWx0ZWRfX759nmtSYBCtK OKztLB4YBBvkqAJiVWHa0lvNpubxRsfOlLx2KUZJaV23kUwR22A69MRJel9dxDfzuT38zTEwKeW IJIunCCS4RCeF6Tnww6DQX1HJSCU3c8ls4FyaHMlRFBAm/hWqKpgnHGwXznPkvNLZtzr8kd5tgu F1xPqwrF6ykDULEZB+ujCSIXu2m35kJf1t3wgi0fKJrr9e8/IYJ0LYWtUG+WPOApsDbvDp6th8x ZoYhmfTSp+lh/HnM1J5ZYrI3li0/HsyvgWYedEy4h9N1+WklI0E/nxKhag14KXBbKQKpLgXLPRo Qr7jDL46fR9iCaI21z1nlQ/f4rr7y0QOjSBeYn0jvDpfwLNCD2QRxuy8juDc6DntVYmWMPog94I t/jAu+6eeW55eeAy7UYOZ+QjSBUFoeYsFd+NuAE6hW0/KM1i1VCgn5p1M5AUk6e+y5GhYqMLZmn VUSZ9F5NmINukCX1KGQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-10_02,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 impostorscore=0 adultscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606100075 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260610_013122_015198_4CF5C118 X-CRM114-Status: GOOD ( 26.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 09, 2026 at 05:04:10PM +0200, Janosch Frank wrote: > On 5/29/26 17:55, Steffen Eiden wrote: > > Introduce Extract Arm System Register and Store Arm System Register to > > enable s390 hosts to read and write system registers for arm64 guests. > > The new instructions use the new RIE_H instruction format. Add assembler > > macros to create instructions in RIE_H format manually. Add Support for > > disassembling the new instructions. > > > > Co-developed-by: Andreas Grapentin > > Signed-off-by: Andreas Grapentin > > Signed-off-by: Steffen Eiden > > --- > > arch/s390/include/asm/sae-asm.h | 48 +++++++++++++++++++++++++++ > > arch/s390/include/asm/sae.h | 58 +++++++++++++++++++++++++++++++++ > > arch/s390/kernel/dis.c | 1 + > > arch/s390/tools/opcodes.txt | 2 ++ > > 4 files changed, 109 insertions(+) > > create mode 100644 arch/s390/include/asm/sae-asm.h > > ... > > diff --git a/arch/s390/include/asm/sae.h b/arch/s390/include/asm/sae.h > > index fe010a1a7729..1d9a16b91b23 100644 > > --- a/arch/s390/include/asm/sae.h > > +++ b/arch/s390/include/asm/sae.h > > @@ -4,6 +4,7 @@ > > #include "linux/linkage.h" > > #include > > +#include > > /* defined in arch/s390/kernel/entry.S */ > > asmlinkage int __sae64a(phys_addr_t sae_block_phys); > > @@ -12,6 +13,12 @@ asmlinkage int __sae64a(phys_addr_t sae_block_phys); > > #include > > #include > > +asm(".include \"asm/sae-asm.h\"\n"); > > + > > +#define _SAE_ASR_REG_SHIFT 5 > > +#define SASR_FLAG_INITIALIZED 0x8 > > +#define EASR_FLAG_SA 0x8 > > s/SA/SAVE_AREA/ or SAVEAREA > > I think both might fit. yes, might be a good idea. > > > + > > /** > > * __sae64a() - Start Arm Execution > > */ > > @@ -20,6 +27,57 @@ static inline void sae64a(struct kvm_sae_block *sae_block) > > __sae64a(virt_to_phys(sae_block)); > > } > > +/** > > + * sasr() - Set Arm System Register > > + * @arm_reg: ARM system register identifier; compile-time constant > > + * @val: Value to set > > + * @save_area: Pointer to SAE save area > > + * @flags: Operation flags; compile-time constant > > + * > > + * Sets an ARM system register value. > > + */ > > +static __always_inline void sasr(unsigned int arm_reg, u64 val, > > + struct kvm_sae_save_area *save_area, > > + u64 flags) > > m4 is 4 bits in length, any reason why we use a u64 here? > Same for easr. > No real reason beside my preference of using u64 by default. Do you want me to change it to u8? Steffen