From: Bjorn Helgaas <helgaas@kernel.org>
To: Rosen Penev <rosenp@gmail.com>
Cc: linux-pci@vger.kernel.org,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Pali Rohár" <pali@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
linusw@kernel.org,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"moderated list:PCI DRIVER FOR MVEBU (Marvell Armada 370 and
Ar...),linusw@kernel.org" <linux-arm-kernel@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCHv2] PCI: mvebu: Use fixed-width interrupt masks
Date: Thu, 11 Jun 2026 11:17:05 -0500 [thread overview]
Message-ID: <20260611161705.GA486072@bhelgaas> (raw)
In-Reply-To: <20260526044016.1025613-1-rosenp@gmail.com>
On Mon, May 25, 2026 at 09:40:16PM -0700, Rosen Penev wrote:
> Use u32-typed BIT and GENMASK helpers for PCIe interrupt register
> masks. This keeps inverted masks in the same width as the registers
> and avoids truncation warnings on 64-bit compile-test builds.
>
> Fixes this and similar warnings:
>
> drivers/pci/controller/pci-mvebu.c:316:21: error: implicit conversion from
> 'unsigned long' to 'u32' (aka 'unsigned int') changes value from
> 18446744069414584320 to 0 [-Werror,-Wconstant-conversion]
> 316 | mvebu_writel(port, ~PCIE_INT_ALL_MASK, PCIE_INT_UNMASK_OFF);
>
> Assisted-by: Codex:GPT-5.5
> Signed-off-by: Rosen Penev <rosenp@gmail.com>
> ---
> v2: remove sys_to_pcie change
> drivers/pci/controller/pci-mvebu.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
> index e568528bad85..f5a3f7370552 100644
> --- a/drivers/pci/controller/pci-mvebu.c
> +++ b/drivers/pci/controller/pci-mvebu.c
> @@ -57,9 +57,9 @@
> #define PCIE_CONF_DATA_OFF 0x18fc
> #define PCIE_INT_CAUSE_OFF 0x1900
> #define PCIE_INT_UNMASK_OFF 0x1910
> -#define PCIE_INT_INTX(i) BIT(24+i)
> -#define PCIE_INT_PM_PME BIT(28)
> -#define PCIE_INT_ALL_MASK GENMASK(31, 0)
> +#define PCIE_INT_INTX(i) BIT_U32(24 + (i))
> +#define PCIE_INT_PM_PME BIT_U32(28)
> +#define PCIE_INT_ALL_MASK GENMASK_U32(31, 0)
This looks like something that could be an issue in dozens of drivers.
Is it? If so, I'd prefer to fix them all at once in a single patch
instead of a slow trickle.
prev parent reply other threads:[~2026-06-11 16:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 4:40 [PATCHv2] PCI: mvebu: Use fixed-width interrupt masks Rosen Penev
2026-06-11 7:20 ` Manivannan Sadhasivam
2026-06-11 16:17 ` Bjorn Helgaas [this message]
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