On Mon, Jun 29, 2026 at 02:49:00PM +0800, Yu-Che Hsieh via B4 Relay wrote:
> From: Yu-Che Hsieh <yc_hsieh@aspeedtech.com>
> 
> Allocating IO and IRQ resources to LPC devices is in-theory an operation
> 
> for the host, however ASPEED systems describe these resources through
> 
> BMC-internal configuration, as already supported by the ASPEED KCS BMC
> 
> binding.
> 
> Add aspeed,lpc-io-reg and aspeed,lpc-interrupts to the ASPEED BT BMC
> 
> binding so firmware can describe the host LPC IO address and SerIRQ
> 
> configuration using the same properties as KCS devices.
> 
> Signed-off-by: Yu-Che Hsieh <yc_hsieh@aspeedtech.com>
> ---
>  .../bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml       | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml
> index c4f7cdbbe16b..1803c6bbae93 100644
> --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml
> +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml
> @@ -25,6 +25,24 @@ properties:
>    interrupts:
>      maxItems: 1
>  
> +  aspeed,lpc-io-reg:
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    maxItems: 1
> +    description: |
> +      The host CPU LPC IO address for the BT device.
> +
> +  aspeed,lpc-interrupts:
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    minItems: 2
> +    maxItems: 2
> +    description: |
> +      A 2-cell property expressing the LPC SerIRQ number and the interrupt
> +      level/sense encoding (specified in the standard fashion).
> +
> +      Note that the generated interrupt is issued from the BMC to the host, and
> +      thus the target interrupt controller is not captured by the BMC's
> +      devicetree.

Why can these two properties not just be an additional reg and
interrupts entry?


Cheers,
Conor.

> +
>  required:
>    - compatible
>    - reg
> @@ -35,10 +53,13 @@ additionalProperties: false
>  examples:
>    - |
>      #include <dt-bindings/clock/aspeed-clock.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
>  
>      bt@1e789140 {
>          compatible = "aspeed,ast2400-ibt-bmc";
>          reg = <0x1e789140 0x18>;
>          interrupts = <8>;
>          clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> +        aspeed,lpc-io-reg = <0xe4>;
> +        aspeed,lpc-interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
>      };
> 
> -- 
> 2.34.1
> 
>