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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="JftmSqqify0j7mOM" Content-Disposition: inline In-Reply-To: <20260629-aspeed-bt-bmc-multichannel-v1-3-fc23ee337f7a@aspeedtech.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --JftmSqqify0j7mOM Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 29, 2026 at 02:49:00PM +0800, Yu-Che Hsieh via B4 Relay wrote: > From: Yu-Che Hsieh >=20 > Allocating IO and IRQ resources to LPC devices is in-theory an operation >=20 > for the host, however ASPEED systems describe these resources through >=20 > BMC-internal configuration, as already supported by the ASPEED KCS BMC >=20 > binding. >=20 > Add aspeed,lpc-io-reg and aspeed,lpc-interrupts to the ASPEED BT BMC >=20 > binding so firmware can describe the host LPC IO address and SerIRQ >=20 > configuration using the same properties as KCS devices. >=20 > Signed-off-by: Yu-Che Hsieh > --- > .../bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml | 21 +++++++++++++++= ++++++ > 1 file changed, 21 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bm= c.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml > index c4f7cdbbe16b..1803c6bbae93 100644 > --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml > +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.yaml > @@ -25,6 +25,24 @@ properties: > interrupts: > maxItems: 1 > =20 > + aspeed,lpc-io-reg: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + maxItems: 1 > + description: | > + The host CPU LPC IO address for the BT device. > + > + aspeed,lpc-interrupts: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + minItems: 2 > + maxItems: 2 > + description: | > + A 2-cell property expressing the LPC SerIRQ number and the interru= pt > + level/sense encoding (specified in the standard fashion). > + > + Note that the generated interrupt is issued from the BMC to the ho= st, and > + thus the target interrupt controller is not captured by the BMC's > + devicetree. Why can these two properties not just be an additional reg and interrupts entry? Cheers, Conor. > + > required: > - compatible > - reg > @@ -35,10 +53,13 @@ additionalProperties: false > examples: > - | > #include > + #include > =20 > bt@1e789140 { > compatible =3D "aspeed,ast2400-ibt-bmc"; > reg =3D <0x1e789140 0x18>; > interrupts =3D <8>; > clocks =3D <&syscon ASPEED_CLK_GATE_LCLK>; > + aspeed,lpc-io-reg =3D <0xe4>; > + aspeed,lpc-interrupts =3D <10 IRQ_TYPE_LEVEL_LOW>; > }; >=20 > --=20 > 2.34.1 >=20 >=20 --JftmSqqify0j7mOM Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCakKOswAKCRB4tDGHoIJi 0psAAP9G4epdhbKfSpCHpiVzmew6DQEbokTKpL+98RgnG2LBKQD/U3BgoLrNNiQx n3K2bKbjCnRtMLKQG2R8sbPvLE9VbwM= =ygXE -----END PGP SIGNATURE----- --JftmSqqify0j7mOM--