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From: Heiko Stuebner <heiko@sntech.de>
To: mkl@pengutronix.de, mailhol@kernel.org
Cc: kernel@pengutronix.de, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, heiko@sntech.de, shawn.lin@rock-chips.com,
	linux-can@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	quentin.schulz@cherry.de, zhangqing@rock-chips.com,
	Heiko Stuebner <heiko.stuebner@cherry.de>
Subject: [PATCH 5/6] arm64: dts: rockchip: Add RK3588 CAN controller nodes
Date: Tue, 30 Jun 2026 18:43:35 +0200	[thread overview]
Message-ID: <20260630164336.3444550-6-heiko@sntech.de> (raw)
In-Reply-To: <20260630164336.3444550-1-heiko@sntech.de>

From: Heiko Stuebner <heiko.stuebner@cherry.de>

The RK3588 has 3 CAN controllers, so add the core nodes for them.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
---
 arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index fc1fdbfd3162..ba82e2f057d2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -2648,6 +2648,45 @@ dmac1: dma-controller@fea30000 {
 		#dma-cells = <1>;
 	};
 
+	can0: can@fea50000 {
+		compatible = "rockchip,rk3588-canfd";
+		reg = <0x0 0xfea50000 0x0 0x1000>;
+		interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
+		clock-names = "baud", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can0m0_pins>;
+		resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;
+		reset-names = "can", "apb";
+		status = "disabled";
+	};
+
+	can1: can@fea60000 {
+		compatible = "rockchip,rk3588-canfd";
+		reg = <0x0 0xfea60000 0x0 0x1000>;
+		interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;
+		clock-names = "baud", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can1m0_pins>;
+		resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>;
+		reset-names = "can", "apb";
+		status = "disabled";
+	};
+
+	can2: can@fea70000 {
+		compatible = "rockchip,rk3588-canfd";
+		reg = <0x0 0xfea70000 0x0 0x1000>;
+		interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;
+		clock-names = "baud", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&can2m0_pins>;
+		resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>;
+		reset-names = "can", "apb";
+		status = "disabled";
+	};
+
 	i2c1: i2c@fea90000 {
 		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xfea90000 0x0 0x1000>;
-- 
2.47.3



  parent reply	other threads:[~2026-06-30 16:44 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-30 16:43 [PATCH 0/6] Enable CAN support on RK3588 Heiko Stuebner
2026-06-30 16:43 ` [PATCH 1/6] dt-bindings: can: rockchip_canfd: add compatible for the RK3588 variant Heiko Stuebner
2026-07-01  7:33   ` Krzysztof Kozlowski
2026-06-30 16:43 ` [PATCH 2/6] can: rockchip-canfd: add support " Heiko Stuebner
2026-06-30 16:43 ` [PATCH 3/6] can: rockchip-canfd: enable erratum 6 on RK3588 Heiko Stuebner
2026-06-30 16:43 ` [PATCH 4/6] can: rockchip-canfd: enable erratum 5 " Heiko Stuebner
2026-06-30 16:43 ` Heiko Stuebner [this message]
2026-06-30 16:43 ` [PATCH 6/6] arm64: dts: rockchip: Enable CAN controller on RK3588-Tiger-Haikou Heiko Stuebner

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