From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3CC8DC43458 for ; Wed, 1 Jul 2026 08:48:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sUW0XZri82aMtP6xGb1BMJz4KHWoX5dfoO6IaJkuwoM=; b=kTIWzCx8EbLcxTuOXvM+ZaQiAa oNCodVwkIrH80xkGxhWZApGy48lpdouA6ihcJTq3PaT7aGTvQjpHvZ+QfAAY8fXU9BGiHT5g+6Gaf 8CAMC+jB1C6CVV55ZJSzx5u+38eIsgY1f8GQMUlz9aNB2bTc25xvjCVEKIpW4x0+yGD3Cc+t7aMhU XVZFsiNe3SQy9lsYRWcedc5/EFy2oz7uVgAFA4r3zU4KyG7P3ZtdZTDFrfE+k7xdpMgVa9XUJKwoH jQD+mq/H5QAUpu52ShE13EnPsS2TEw2S/Lnvtybm+ejpVgKO5BGzSUI5hdjd/rCxRG9srz7J3v5bi BbK5Ulcw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1weqcl-000000015ov-3aIu; Wed, 01 Jul 2026 08:48:51 +0000 Received: from out-186.mta0.migadu.com ([91.218.175.186]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1weqcj-000000015i3-0KDS for linux-arm-kernel@lists.infradead.org; Wed, 01 Jul 2026 08:48:50 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782895727; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sUW0XZri82aMtP6xGb1BMJz4KHWoX5dfoO6IaJkuwoM=; b=RoCoBX0PfwZQeU9w77RFFBy+s+rOO0O4oDNUt3zvziV7gp8qGhdfcfWyyvkOhq2J2nRcSo vFXJtyIKwjqEeMojsNRAFxVOs7NPp9YOeUVQA4itBl5/qWq2FDSd8ase1pAfMi/04y43L/ dLHo7mTjOESzkaZCwGAdXUmdPe0CpHY= From: Atish Patra Date: Wed, 01 Jul 2026 01:47:05 -0700 Subject: [PATCH v8 17/22] RISC-V: perf: Add legacy event encodings via sysfs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260701-counter_delegation-v8-17-7909f863a645@meta.com> References: <20260701-counter_delegation-v8-0-7909f863a645@meta.com> In-Reply-To: <20260701-counter_delegation-v8-0-7909f863a645@meta.com> To: Jiri Olsa , Paul Walmsley , Mark Rutland , Rob Herring , Anup Patel , Namhyung Kim , Arnaldo Carvalho de Melo , Krzysztof Kozlowski , Atish Patra , Ian Rogers , Will Deacon , James Clark Cc: linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-perf-users@vger.kernel.org, Conor Dooley X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260701_014849_286154_EBF8250E X-CRM114-Status: GOOD ( 15.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Atish Patra Define sysfs details for the legacy events so that any tool can parse these to understand the minimum set of legacy events supported by the platform. The sysfs entry will describe both event encoding and corresponding counter map so that an perf event can be programmed accordingly. Signed-off-by: Atish Patra --- drivers/perf/riscv_pmu_sbi.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 19d9e4750424..8d56bef95a1b 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -131,7 +131,20 @@ static struct attribute_group riscv_cdeleg_pmu_format_group = { .attrs = riscv_cdeleg_pmu_formats_attr, }; +#define RVPMU_EVENT_ATTR_RESOLVE(m) #m +#define RVPMU_EVENT_CMASK_ATTR(_name, _var, config, mask) \ + PMU_EVENT_ATTR_STRING(_name, rvpmu_event_attr_##_var, \ + "event=" RVPMU_EVENT_ATTR_RESOLVE(config) \ + ",counterid_mask=" RVPMU_EVENT_ATTR_RESOLVE(mask)) + +#define RVPMU_EVENT_ATTR_PTR(name) (&rvpmu_event_attr_##name.attr.attr) + +static struct attribute_group riscv_cdeleg_pmu_event_group __ro_after_init = { + .name = "events", +}; + static const struct attribute_group *riscv_cdeleg_pmu_attr_groups[] = { + &riscv_cdeleg_pmu_event_group, &riscv_cdeleg_pmu_format_group, NULL, }; @@ -447,11 +460,14 @@ struct riscv_vendor_pmu_events { const struct riscv_pmu_event *hw_event_map; const struct riscv_pmu_event (*cache_event_map)[PERF_COUNT_HW_CACHE_OP_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX]; + struct attribute **attrs_events; }; -#define RISCV_VENDOR_PMU_EVENTS(_vendorid, _archid, _implid, _hw_event_map, _cache_event_map) \ +#define RISCV_VENDOR_PMU_EVENTS(_vendorid, _archid, _implid, _hw_event_map, \ + _cache_event_map, _attrs) \ { .vendorid = _vendorid, .archid = _archid, .implid = _implid, \ - .hw_event_map = _hw_event_map, .cache_event_map = _cache_event_map }, + .hw_event_map = _hw_event_map, .cache_event_map = _cache_event_map, \ + .attrs_events = _attrs }, static struct riscv_vendor_pmu_events pmu_vendor_events_table[] = { }; @@ -473,6 +489,8 @@ static void __init rvpmu_vendor_register_events(void) pmu_vendor_events_table[i].archid == arch_id) { current_pmu_hw_event_map = pmu_vendor_events_table[i].hw_event_map; current_pmu_cache_event_map = pmu_vendor_events_table[i].cache_event_map; + riscv_cdeleg_pmu_event_group.attrs = + pmu_vendor_events_table[i].attrs_events; break; } } -- 2.53.0-Meta