From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0AD3AC43327 for ; Wed, 1 Jul 2026 08:49:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Vtg6gtjTXG/5kZ90vLQ3ZK8HeIu7FaVLNgb7sibmyzw=; b=fXhY/W3e4sn9fuFTphYbjEB4Xf wh7oEaSF6qXv9Bl1qLNJGY1baGn2CdgDGN5sVg+gKEQY3CvxvfRpCZa1nkfu+7KDi3sz6hoRE0R3+ ZuWpvfNEoHDBi/3ro+8NOMZ8zKYN8GUNusDwGhoNjD2+7RMTa+76UWucGjpRstjKkPdGDlBZbUnpB fw3uE3XcTzoNpc8Gq882Xb2FdQqjAY7MUziSxWBP1Qx5U3gTS2fgN4D8m2RjPd4r/eZC/XpDiFS/0 nZDmg6ArDdTYcDUIDNdARLT20+48j9VWhXvn46QAttSJLchWqE5LdRWpJ6IrrMho9/JIh2zrtnMVZ PLeiHPRw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1weqcv-0000000167e-3KLr; Wed, 01 Jul 2026 08:49:01 +0000 Received: from out-170.mta0.migadu.com ([2001:41d0:1004:224b::aa]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1weqct-0000000160t-3WOb for linux-arm-kernel@lists.infradead.org; Wed, 01 Jul 2026 08:49:01 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782895737; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Vtg6gtjTXG/5kZ90vLQ3ZK8HeIu7FaVLNgb7sibmyzw=; b=PVOo7ZBmM6YIM0NolMjtxLKfchiQEr7jsQyDsVfx1ILzRodHDDodTu/+8yZ/a8/ZWI+xsS loVXakO8WmEY/K3R/2MI5d+kkGXuY6uZti8GYMEisHs+IN0qKtKhw3y1/G2iNRPhgF8yLE bNBxjuDWrFbO0ZnwwXQ3Rtp1dmB6abc= From: Atish Patra Date: Wed, 01 Jul 2026 01:47:08 -0700 Subject: [PATCH v8 20/22] tools/perf: Add RISC-V CounterIDMask event field MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260701-counter_delegation-v8-20-7909f863a645@meta.com> References: <20260701-counter_delegation-v8-0-7909f863a645@meta.com> In-Reply-To: <20260701-counter_delegation-v8-0-7909f863a645@meta.com> To: Jiri Olsa , Paul Walmsley , Mark Rutland , Rob Herring , Anup Patel , Namhyung Kim , Arnaldo Carvalho de Melo , Krzysztof Kozlowski , Atish Patra , Ian Rogers , Will Deacon , James Clark Cc: linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-perf-users@vger.kernel.org, Conor Dooley X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260701_014900_029067_9B12A0B1 X-CRM114-Status: GOOD ( 12.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Atish Patra Counter delegation lets supervisor mode choose the hpmcounter for an event, but the hardware may only allow a given event on a subset of counters. Add a RISC-V specific "CounterIDMask" json event field, handled like the other arch-specific entries in event_fields[], that carries the allowed-counter bitmask through to the driver's existing counterid_mask (config2:0-31) format. The value is the bitmask directly so no counter-list to bitmask conversion is needed, and because the field is RISC-V specific it is a no-op for every other architecture's events (unlike the shared "Counter" field). Signed-off-by: Atish Patra --- tools/perf/pmu-events/jevents.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 0cf9d26315b3..516fb73886ed 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -396,6 +396,7 @@ class JsonEvent: ('EnAllSlices', 'enallslices='), ('SliceId', 'sliceid='), ('ThreadMask', 'threadmask='), + ('CounterIDMask', 'counterid_mask='), ] for key, value in event_fields: if key in jd and not is_zero(jd[key]): -- 2.53.0-Meta