From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Joey Gouly <joey.gouly@arm.com>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 4/4] arm64: Remove hidden bitfields from cpu-feature-registers.rst
Date: Thu, 02 Jul 2026 20:11:19 +0100 [thread overview]
Message-ID: <20260702-arm64-cpu-ftr-regs-v2-4-fe0b78f1bd93@kernel.org> (raw)
In-Reply-To: <20260702-arm64-cpu-ftr-regs-v2-0-fe0b78f1bd93@kernel.org>
We currently have a visibility column in the tables for the registers in
cpu-feature-registers.rst but this is always "y" for every register other
than ID_AA64PFR0_EL1. Given that the documentation of the full set of
bitfields is readily available in the architecture documentation it is
redundant for us to explicitly document things we don't advertise, and the
kernel documentation will inevitably lag the architecture.
Just remove the visibility column and hidden bitfields.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
Documentation/arch/arm64/cpu-feature-registers.rst | 618 ++++++++++-----------
1 file changed, 303 insertions(+), 315 deletions(-)
diff --git a/Documentation/arch/arm64/cpu-feature-registers.rst b/Documentation/arch/arm64/cpu-feature-registers.rst
index 683bdd90c705..fc63ccb666bf 100644
--- a/Documentation/arch/arm64/cpu-feature-registers.rst
+++ b/Documentation/arch/arm64/cpu-feature-registers.rst
@@ -115,355 +115,343 @@ infrastructure:
ID_AA64FPFR0_EL1 - Floating Point feature ID register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | F8CVT | [31] | y |
- +------------------------------+---------+---------+
- | F8FMA | [30] | y |
- +------------------------------+---------+---------+
- | F8DP4 | [29] | y |
- +------------------------------+---------+---------+
- | F8DP2 | [28] | y |
- +------------------------------+---------+---------+
- | F8MM8 | [27] | y |
- +------------------------------+---------+---------+
- | F8MM4 | [26] | y |
- +------------------------------+---------+---------+
- | F16MM2 | [15] | y |
- +------------------------------+---------+---------+
- | F8E4M3 | [1] | y |
- +------------------------------+---------+---------+
- | F8E5M2 | [0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | F8CVT | [31] |
+ +------------------------------+---------+
+ | F8FMA | [30] |
+ +------------------------------+---------+
+ | F8DP4 | [29] |
+ +------------------------------+---------+
+ | F8DP2 | [28] |
+ +------------------------------+---------+
+ | F8MM8 | [27] |
+ +------------------------------+---------+
+ | F8MM4 | [26] |
+ +------------------------------+---------+
+ | F16MM2 | [15] |
+ +------------------------------+---------+
+ | F8E4M3 | [1] |
+ +------------------------------+---------+
+ | F8E5M2 | [0] |
+ +------------------------------+---------+
ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | RNDR | [63-60] | y |
- +------------------------------+---------+---------+
- | TS | [55-52] | y |
- +------------------------------+---------+---------+
- | FHM | [51-48] | y |
- +------------------------------+---------+---------+
- | DP | [47-44] | y |
- +------------------------------+---------+---------+
- | SM4 | [43-40] | y |
- +------------------------------+---------+---------+
- | SM3 | [39-36] | y |
- +------------------------------+---------+---------+
- | SHA3 | [35-32] | y |
- +------------------------------+---------+---------+
- | RDM | [31-28] | y |
- +------------------------------+---------+---------+
- | ATOMICS | [23-20] | y |
- +------------------------------+---------+---------+
- | CRC32 | [19-16] | y |
- +------------------------------+---------+---------+
- | SHA2 | [15-12] | y |
- +------------------------------+---------+---------+
- | SHA1 | [11-8] | y |
- +------------------------------+---------+---------+
- | AES | [7-4] | y |
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | RNDR | [63-60] |
+ +------------------------------+---------+
+ | TS | [55-52] |
+ +------------------------------+---------+
+ | FHM | [51-48] |
+ +------------------------------+---------+
+ | DP | [47-44] |
+ +------------------------------+---------+
+ | SM4 | [43-40] |
+ +------------------------------+---------+
+ | SM3 | [39-36] |
+ +------------------------------+---------+
+ | SHA3 | [35-32] |
+ +------------------------------+---------+
+ | RDM | [31-28] |
+ +------------------------------+---------+
+ | ATOMICS | [23-20] |
+ +------------------------------+---------+
+ | CRC32 | [19-16] |
+ +------------------------------+---------+
+ | SHA2 | [15-12] |
+ +------------------------------+---------+
+ | SHA1 | [11-8] |
+ +------------------------------+---------+
+ | AES | [7-4] |
+------------------------------+---------+---------+
ID_AA64ISAR1_EL1 - Instruction set attribute register 1
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | LS64 | [63-60] | y |
- +------------------------------+---------+---------+
- | I8MM | [55-52] | y |
- +------------------------------+---------+---------+
- | DGH | [51-48] | y |
- +------------------------------+---------+---------+
- | BF16 | [47-44] | y |
- +------------------------------+---------+---------+
- | SB | [39-36] | y |
- +------------------------------+---------+---------+
- | FRINTTS | [35-32] | y |
- +------------------------------+---------+---------+
- | GPI | [31-28] | y |
- +------------------------------+---------+---------+
- | GPA | [27-24] | y |
- +------------------------------+---------+---------+
- | LRCPC | [23-20] | y |
- +------------------------------+---------+---------+
- | FCMA | [19-16] | y |
- +------------------------------+---------+---------+
- | JSCVT | [15-12] | y |
- +------------------------------+---------+---------+
- | API | [11-8] | y |
- +------------------------------+---------+---------+
- | APA | [7-4] | y |
- +------------------------------+---------+---------+
- | DPB | [3-0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | LS64 | [63-60] |
+ +------------------------------+---------+
+ | I8MM | [55-52] |
+ +------------------------------+---------+
+ | DGH | [51-48] |
+ +------------------------------+---------+
+ | BF16 | [47-44] |
+ +------------------------------+---------+
+ | SB | [39-36] |
+ +------------------------------+---------+
+ | FRINTTS | [35-32] |
+ +------------------------------+---------+
+ | GPI | [31-28] |
+ +------------------------------+---------+
+ | GPA | [27-24] |
+ +------------------------------+---------+
+ | LRCPC | [23-20] |
+ +------------------------------+---------+
+ | FCMA | [19-16] |
+ +------------------------------+---------+
+ | JSCVT | [15-12] |
+ +------------------------------+---------+
+ | API | [11-8] |
+ +------------------------------+---------+
+ | APA | [7-4] |
+ +------------------------------+---------+
+ | DPB | [3-0] |
+ +------------------------------+---------+
ID_AA64ISAR2_EL1 - Instruction set attribute register 2
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | LUT | [59-56] | y |
- +------------------------------+---------+---------+
- | CSSC | [55-52] | y |
- +------------------------------+---------+---------+
- | RPRFM | [51-48] | y |
- +------------------------------+---------+---------+
- | BC | [23-20] | y |
- +------------------------------+---------+---------+
- | MOPS | [19-16] | y |
- +------------------------------+---------+---------+
- | APA3 | [15-12] | y |
- +------------------------------+---------+---------+
- | GPA3 | [11-8] | y |
- +------------------------------+---------+---------+
- | RPRES | [7-4] | y |
- +------------------------------+---------+---------+
- | WFXT | [3-0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | LUT | [59-56] |
+ +------------------------------+---------+
+ | CSSC | [55-52] |
+ +------------------------------+---------+
+ | RPRFM | [51-48] |
+ +------------------------------+---------+
+ | BC | [23-20] |
+ +------------------------------+---------+
+ | MOPS | [19-16] |
+ +------------------------------+---------+
+ | APA3 | [15-12] |
+ +------------------------------+---------+
+ | GPA3 | [11-8] |
+ +------------------------------+---------+
+ | RPRES | [7-4] |
+ +------------------------------+---------+
+ | WFXT | [3-0] |
+ +------------------------------+---------+
ID_AA64ISAR3_EL1 - Instruction set attribute register 3
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | FPRCVT | [31-28] | y |
- +------------------------------+---------+---------+
- | LSFE | [19-16] | y |
- +------------------------------+---------+---------+
- | FAMINMAX | [7-4] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | FPRCVT | [31-28] |
+ +------------------------------+---------+
+ | LSFE | [19-16] |
+ +------------------------------+---------+
+ | FAMINMAX | [7-4] |
+ +------------------------------+---------+
ID_AA64MMFR0_EL1 - Memory model feature register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | ECV | [63-60] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | ECV | [63-60] |
+ +------------------------------+---------+
ID_AA64MMFR1_EL1 - Memory model feature register 1
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | AFP | [47-44] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | AFP | [47-44] |
+ +------------------------------+---------+
ID_AA64MMFR2_EL1 - Memory model feature register 2
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | AT | [35-32] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | AT | [35-32] |
+ +------------------------------+---------+
ID_AA64MMFR3_EL1 - Memory model feature register 3
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | S1POE | [19-16] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | S1POE | [19-16] |
+ +------------------------------+---------+
ID_AA64PFR0_EL1 - Processor Feature Register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | DIT | [51-48] | y |
- +------------------------------+---------+---------+
- | MPAM | [43-40] | n |
- +------------------------------+---------+---------+
- | SVE | [35-32] | y |
- +------------------------------+---------+---------+
- | GIC | [27-24] | n |
- +------------------------------+---------+---------+
- | AdvSIMD | [23-20] | y |
- +------------------------------+---------+---------+
- | FP | [19-16] | y |
- +------------------------------+---------+---------+
- | EL3 | [15-12] | n |
- +------------------------------+---------+---------+
- | EL2 | [11-8] | n |
- +------------------------------+---------+---------+
- | EL1 | [7-4] | n |
- +------------------------------+---------+---------+
- | EL0 | [3-0] | n |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | DIT | [51-48] |
+ +------------------------------+---------+
+ | SVE | [35-32] |
+ +------------------------------+---------+
+ | AdvSIMD | [23-20] |
+ +------------------------------+---------+
+ | FP | [19-16] |
+ +------------------------------+---------+
ID_AA64PFR1_EL1 - Processor Feature Register 1
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | GCS | [47-44] | y |
- +------------------------------+---------+---------+
- | SME | [27-24] | y |
- +------------------------------+---------+---------+
- | MTE | [11-8] | y |
- +------------------------------+---------+---------+
- | SSBS | [7-4] | y |
- +------------------------------+---------+---------+
- | BT | [3-0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | GCS | [47-44] |
+ +------------------------------+---------+
+ | SME | [27-24] |
+ +------------------------------+---------+
+ | MTE | [11-8] |
+ +------------------------------+---------+
+ | SSBS | [7-4] |
+ +------------------------------+---------+
+ | BT | [3-0] |
+ +------------------------------+---------+
ID_AA64PFR2_EL1 - Processor Feature Register 2
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | FPMR | [35-32] | y |
- +------------------------------+---------+---------+
- | MTEFAR | [11-8] | y |
- +------------------------------+---------+---------+
- | MTESTOREONLY | [7-4] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | FPMR | [35-32] |
+ +------------------------------+---------+
+ | MTEFAR | [11-8] |
+ +------------------------------+---------+
+ | MTESTOREONLY | [7-4] |
+ +------------------------------+---------+
ID_AA64SMFR0_EL1 - SME feature ID register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | FA64 | [63] | y |
- +------------------------------+---------+---------+
- | LUT6 | [61] | y |
- +------------------------------+---------+---------+
- | LUTv2 | [60] | y |
- +------------------------------+---------+---------+
- | SMEver | [59-56] | y |
- +------------------------------+---------+---------+
- | I16I64 | [55-52] | y |
- +------------------------------+---------+---------+
- | F64F64 | [48] | y |
- +------------------------------+---------+---------+
- | I16I32 | [47-44] | y |
- +------------------------------+---------+---------+
- | B16B16 | [43] | y |
- +------------------------------+---------+---------+
- | F16F16 | [42] | y |
- +------------------------------+---------+---------+
- | F8F16 | [41] | y |
- +------------------------------+---------+---------+
- | F8F32 | [40] | y |
- +------------------------------+---------+---------+
- | I8I32 | [39-36] | y |
- +------------------------------+---------+---------+
- | F16F32 | [35] | y |
- +------------------------------+---------+---------+
- | B16F32 | [34] | y |
- +------------------------------+---------+---------+
- | BI32I32 | [33] | y |
- +------------------------------+---------+---------+
- | F32F32 | [32] | y |
- +------------------------------+---------+---------+
- | SF8FMA | [30] | y |
- +------------------------------+---------+---------+
- | SF8DP4 | [29] | y |
- +------------------------------+---------+---------+
- | SF8DP2 | [28] | y |
- +------------------------------+---------+---------+
- | SBitPerm | [25] | y |
- +------------------------------+---------+---------+
- | AES | [24] | y |
- +------------------------------+---------+---------+
- | SFEXPA | [23] | y |
- +------------------------------+---------+---------+
- | STMOP | [16] | y |
- +------------------------------+---------+---------+
- | SMOP4 | [0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | FA64 | [63] |
+ +------------------------------+---------+
+ | LUT6 | [61] |
+ +------------------------------+---------+
+ | LUTv2 | [60] |
+ +------------------------------+---------+
+ | SMEver | [59-56] |
+ +------------------------------+---------+
+ | I16I64 | [55-52] |
+ +------------------------------+---------+
+ | F64F64 | [48] |
+ +------------------------------+---------+
+ | I16I32 | [47-44] |
+ +------------------------------+---------+
+ | B16B16 | [43] |
+ +------------------------------+---------+
+ | F16F16 | [42] |
+ +------------------------------+---------+
+ | F8F16 | [41] |
+ +------------------------------+---------+
+ | F8F32 | [40] |
+ +------------------------------+---------+
+ | I8I32 | [39-36] |
+ +------------------------------+---------+
+ | F16F32 | [35] |
+ +------------------------------+---------+
+ | B16F32 | [34] |
+ +------------------------------+---------+
+ | BI32I32 | [33] |
+ +------------------------------+---------+
+ | F32F32 | [32] |
+ +------------------------------+---------+
+ | SF8FMA | [30] |
+ +------------------------------+---------+
+ | SF8DP4 | [29] |
+ +------------------------------+---------+
+ | SF8DP2 | [28] |
+ +------------------------------+---------+
+ | SBitPerm | [25] |
+ +------------------------------+---------+
+ | AES | [24] |
+ +------------------------------+---------+
+ | SFEXPA | [23] |
+ +------------------------------+---------+
+ | STMOP | [16] |
+ +------------------------------+---------+
+ | SMOP4 | [0] |
+ +------------------------------+---------+
ID_AA64ZFR0_EL1 - SVE feature ID register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | F64MM | [59-56] | y |
- +------------------------------+---------+---------+
- | F32MM | [55-52] | y |
- +------------------------------+---------+---------+
- | F16MM | [51-48] | y |
- +------------------------------+---------+---------+
- | I8MM | [47-44] | y |
- +------------------------------+---------+---------+
- | SM4 | [43-40] | y |
- +------------------------------+---------+---------+
- | SHA3 | [35-32] | y |
- +------------------------------+---------+---------+
- | B16B16 | [27-24] | y |
- +------------------------------+---------+---------+
- | BF16 | [23-20] | y |
- +------------------------------+---------+---------+
- | BitPerm | [19-16] | y |
- +------------------------------+---------+---------+
- | EltPerm | [15-12] | y |
- +------------------------------+---------+---------+
- | AES | [7-4] | y |
- +------------------------------+---------+---------+
- | SVEVer | [3-0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | F64MM | [59-56] |
+ +------------------------------+---------+
+ | F32MM | [55-52] |
+ +------------------------------+---------+
+ | F16MM | [51-48] |
+ +------------------------------+---------+
+ | I8MM | [47-44] |
+ +------------------------------+---------+
+ | SM4 | [43-40] |
+ +------------------------------+---------+
+ | SHA3 | [35-32] |
+ +------------------------------+---------+
+ | B16B16 | [27-24] |
+ +------------------------------+---------+
+ | BF16 | [23-20] |
+ +------------------------------+---------+
+ | BitPerm | [19-16] |
+ +------------------------------+---------+
+ | EltPerm | [15-12] |
+ +------------------------------+---------+
+ | AES | [7-4] |
+ +------------------------------+---------+
+ | SVEVer | [3-0] |
+ +------------------------------+---------+
ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | CRC32 | [19-16] | y |
- +------------------------------+---------+---------+
- | SHA2 | [15-12] | y |
- +------------------------------+---------+---------+
- | SHA1 | [11-8] | y |
- +------------------------------+---------+---------+
- | AES | [7-4] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | CRC32 | [19-16] |
+ +------------------------------+---------+
+ | SHA2 | [15-12] |
+ +------------------------------+---------+
+ | SHA1 | [11-8] |
+ +------------------------------+---------+
+ | AES | [7-4] |
+ +------------------------------+---------+
ID_ISAR6_EL1 - AArch32 Instruction Set Attribute Register 6
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | I8MM | [27-24] | y |
- +------------------------------+---------+---------+
- | BF16 | [23-20] | y |
- +------------------------------+---------+---------+
- | SB | [15-12] | y |
- +------------------------------+---------+---------+
- | FHM | [11-8] | y |
- +------------------------------+---------+---------+
- | DP | [7-4] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | I8MM | [27-24] |
+ +------------------------------+---------+
+ | BF16 | [23-20] |
+ +------------------------------+---------+
+ | SB | [15-12] |
+ +------------------------------+---------+
+ | FHM | [11-8] |
+ +------------------------------+---------+
+ | DP | [7-4] |
+ +------------------------------+---------+
ID_PFR2_EL1 - AArch32 Processor Feature Register 2
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | SSBS | [7-4] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | SSBS | [7-4] |
+ +------------------------------+---------+
MIDR_EL1 - Main ID Register
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | Implementer | [31-24] | y |
- +------------------------------+---------+---------+
- | Variant | [23-20] | y |
- +------------------------------+---------+---------+
- | Architecture | [19-16] | y |
- +------------------------------+---------+---------+
- | PartNum | [15-4] | y |
- +------------------------------+---------+---------+
- | Revision | [3-0] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | Implementer | [31-24] |
+ +------------------------------+---------+
+ | Variant | [23-20] |
+ +------------------------------+---------+
+ | Architecture | [19-16] |
+ +------------------------------+---------+
+ | PartNum | [15-4] |
+ +------------------------------+---------+
+ | Revision | [3-0] |
+ +------------------------------+---------+
NOTE: The 'visible' fields of MIDR_EL1 will contain the value
as available on the CPU where it is fetched and is not a system
@@ -471,29 +459,29 @@ infrastructure:
MVFR0_EL1 - AArch32 Media and VFP Feature Register 0
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | FPDP | [11-8] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | FPDP | [11-8] |
+ +------------------------------+---------+
MVFR1_EL1 - AArch32 Media and VFP Feature Register 1
- +------------------------------+---------+---------+
- | Name | bits | visible |
- +------------------------------+---------+---------+
- | SIMDFMAC | [31-28] | y |
- +------------------------------+---------+---------+
- | FPHP | [27-24] | y |
- +------------------------------+---------+---------+
- | SIMDHP | [23-20] | y |
- +------------------------------+---------+---------+
- | SIMDSP | [19-16] | y |
- +------------------------------+---------+---------+
- | SIMDInt | [15-12] | y |
- +------------------------------+---------+---------+
- | SIMDLS | [11-8] | y |
- +------------------------------+---------+---------+
+ +------------------------------+---------+
+ | Name | bits |
+ +------------------------------+---------+
+ | SIMDFMAC | [31-28] |
+ +------------------------------+---------+
+ | FPHP | [27-24] |
+ +------------------------------+---------+
+ | SIMDHP | [23-20] |
+ +------------------------------+---------+
+ | SIMDSP | [19-16] |
+ +------------------------------+---------+
+ | SIMDInt | [15-12] |
+ +------------------------------+---------+
+ | SIMDLS | [11-8] |
+ +------------------------------+---------+
Appendix I: Example
--
2.47.3
prev parent reply other threads:[~2026-07-02 19:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-02 19:11 [PATCH v2 0/4] arm64: Fixes and cleanups for cpu-feature-registers.rst Mark Brown
2026-07-02 19:11 ` [PATCH v2 1/4] arm64: Don't number registers in cpu-feature-registers.rst Mark Brown
2026-07-02 19:11 ` [PATCH v2 2/4] arm64: Document missing bitfields " Mark Brown
2026-07-02 19:11 ` [PATCH v2 3/4] arm64: Sort registers " Mark Brown
2026-07-02 19:11 ` Mark Brown [this message]
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