From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D105AC43458 for ; Thu, 2 Jul 2026 16:03:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=lkRmJfjduZK9IpL92pMpmu7hELRF8zY2e5+CUCrWXcs=; b=Xg8TuGMh+sfc2EOkx3yilnEd5x AdxZ6dQDqVGMxfPdIUrU9lbHzBC0/wTiYz1zyN4QuSMZvazyy/nQBSZW74cjUueerQW1RqKnaqX/4 kr2raGBbKFUwf0IRY9ftSXu7uRbdhhx6hLGHxmUnEQev+bJJrxRIl61+Mnqd+qGxm2L8brr5rzRcK 2HEjX1TcM0USpOuhGkfnNTxak6A8OJHieB9tmuG3MrcMqWKNr1SrEQzrouv0ClLI7x6EYWGVuczq2 5peeBfc4H0MmIDxhot7IUYpxfb3FszHwyxOuZj9kj/E0HxLtLiRTiWp40ubDQnDar+w7DVgf8+0fN d+bwvDag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wfJsU-00000004uDW-2qrF; Thu, 02 Jul 2026 16:03:02 +0000 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wfJsS-00000004uBy-3P9N for linux-arm-kernel@lists.infradead.org; Thu, 02 Jul 2026 16:03:00 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 9076C43466; Thu, 2 Jul 2026 16:03:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6CA5D1F00A3D; Thu, 2 Jul 2026 16:03:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783008180; bh=lkRmJfjduZK9IpL92pMpmu7hELRF8zY2e5+CUCrWXcs=; h=From:To:Cc:Subject:Date; b=XTbNbKQ+/p0h8CFLoiMLzwJChp9SYauDq9FBOQXktnbBXLGwRFtznu33HATZQ+xc+ qRWpPzHQdBdSyHbxWH2n1zWPDGYg3lH9vsBUg5edBoOF18wcgfZ5HfEzpg1ITQjlTT czkcd5UD4cvu9byr2oJBHudAI9sDqsrmQJffFdsJ3OyNAlj6Xp4DK5dPfQbFJzVzDL M38chUi7n5zfSAMI3xCgvPND2HT4KE65n1jAfJPyWLQ6LbDOYjubPyxn5DQa3drMda bPv7bJUxJrIQUmS3L0iB4HoxqybK9GfAKPeYE5z1NAzKwekbmHQyKH4WeyKsI/xgyf ObCoURcQ3YkDg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wfJsQ-00000000ojd-0KJS; Thu, 02 Jul 2026 16:02:58 +0000 From: Marc Zyngier To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Cc: Steffen Eiden , Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH 00/28] KVM: arm64: Add support for FEAT_NV2p1 and FEAT_NV3 Date: Thu, 2 Jul 2026 17:02:20 +0100 Message-ID: <20260702160248.1377250-1-maz@kernel.org> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, seiden@linux.ibm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds support for two extensions targeting Nested Virt on arm64: - FEAT_NV2p1 is effectively a bug fix for two registers (CNTHCTL_EL2 and CPTR_EL2) that are missing stateful bits when accessed from EL1 in a NV configuration. When this is present, the hypervisor can avoid a bunch of traps. - FEAT_NV3 is much more ambitious, and changes the way ERET behaves in a NV environment. By moving EL1 accesses to HCR_EL2 from memory (via VNCR) to a dedicated register (NVHCR_EL2), the HW can detect whether the guest is performing an ERET for itself (NVHCR_EL2.TGE==1) or to its own guest (NVHCR_EL2.TGE==0). In the former case, ERET is done directly, and no trap occurs. Similar optimisations are available for a class of TLBI instructions. The whole thing has been tested on an FVP model, and shown measurable improvements for an L1 guest (about 1.5% fewer instructions). Given that this isn't very convincing on its own, I have built an approximate emulation of FEAT_NV3 that L1 (and deeper levels) can use on actual production hardware. For these deeper levels, the numbers are in the double digit of percentage point reduction (those interested can look at the patches in the kvm-arm64/nv3 branch in my tree). Does it make NV better? Yes! Does it make NV good? Get real! Anyway, patches on top of -rc1 plus the current state of kvmarm/fixes. Marc Zyngier (28): arm64: sysreg: Emit RESx/UNKN values for Mapping definitions arm64: Update ID_AA64MMFR4_EL1 description to 2026-03 JSON release KVM: arm64: Merge guest's HCRX_EL2 using NV_HCRX_GUEST_EXCLUDE KVM: arm64: Drop __HCRX_EL2_* masks KVM: arm64: Plumb HCRX_EL2.SRMASKEn in HCRX_EL2 sanitisation KVM: arm64: Classify CPTR_EL2 as a SR_LOC_SPECIAL register KVM: arm64: Don't evaluate HCR_EL2.NV on ERET fast path arm64: Add ARM64_HAS_NV2P1 capability KVM: arm64: Relax CPTR_EL2 handling when FEAT_NV2p1 is present KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present KVM: arm64: Expose FEAT_NV2p1 to NV guests arm64: Add FEAT_NV2p1 detection arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2 arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3 arm64: Add ARM64_HAS_NV3 capability KVM: arm64: Split NV-specific exit fixups from the non-NV handling KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation KVM: arm64: Add kvm_has_nv{2,3}() predicates KVM: arm64: Make HCR_EL2 a non-VNCR register KVM: arm64: Add sanitisation for NVHCR_EL2 KVM: arm64: Add NVHCR_EL2 handling to the sysreg array KVM: arm64: Add routing for NVHCR_EL2 trap KVM: arm64: Add NVHCR_EL2 context switching KVM: arm64: Engage NV3 ERET trap elision KVM: arm64: Engage NV3 TLBI trap elision KVM: arm64: Add FEAT_NV3 detection KVM: arm64: Expose FEAT_NV3 to guests arm64: Add override for ID_AA64MMFR4_EL1.NV_frac arch/arm64/include/asm/cpufeature.h | 1 + arch/arm64/include/asm/kvm_arm.h | 15 ------ arch/arm64/include/asm/kvm_emulate.h | 41 +++++++++++++++- arch/arm64/include/asm/kvm_host.h | 3 +- arch/arm64/include/asm/vncr_mapping.h | 2 +- arch/arm64/kernel/cpufeature.c | 18 ++++++- arch/arm64/kernel/image-vars.h | 1 + arch/arm64/kernel/pi/idreg-override.c | 10 ++++ arch/arm64/kvm/arch_timer.c | 10 +++- arch/arm64/kvm/config.c | 25 +++++++++- arch/arm64/kvm/emulate-nested.c | 16 ++++-- arch/arm64/kvm/hyp/include/hyp/switch.h | 27 ++++++++-- arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 11 +++++ arch/arm64/kvm/hyp/vhe/switch.c | 44 +++++++++++++---- arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 21 +++++--- arch/arm64/kvm/nested.c | 14 +++++- arch/arm64/kvm/sys_regs.c | 57 ++++++++++++++++++++-- arch/arm64/tools/cpucaps | 2 + arch/arm64/tools/gen-sysreg.awk | 14 ++++-- arch/arm64/tools/sysreg | 42 ++++++++++++++-- 20 files changed, 313 insertions(+), 61 deletions(-) -- 2.47.3