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bh=3R1gWPaiItuEMxFOZsKEpycG2kSertLK7DcDGmeuD5A=; b=qT40Wz79XWmjYujjZpDcgS+jAn7PuAwqNep7KJUM6mnsdKFLnZ2kGI2mfi5LcKEVUwqtbn f3eiFAfoEf+iK+Aw+NxJ1SApQkrA5+kz7wRf3nxUIZuZZ0ScUWbLpcbo2JKNiOkrj0FFs9 dGfHZGMIECoLcBklceTFhn9GoQWzSBrqvk0qc40b14yX4dDvgsrUpDaXY4bW7oVUXEMUXF lTI6JKQsBjEy+OcJgOw0dV6SB7QZPBTHQ1vTMIRfUorKVsrF85p7hNJBvHXSeifqzUD8y8 d0j43JUgTOlUs3s5NZLJ++I7rR5OvC3w0v2OFIBhfhbcdrKeHuj7UNxHeFJNpA== To: linux-pci@vger.kernel.org Cc: Marek Vasut , Marc Zyngier , Thomas Gleixner , Yoshihiro Shimoda , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Catalin Marinas , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Lorenzo Pieralisi , Manivannan Sadhasivam , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 4/5] irqchip/gic-v3: Add Renesas R-Car Gen4 erratum workaround Date: Tue, 7 Jul 2026 22:35:42 +0200 Message-ID: <20260707203743.88299-5-marek.vasut+renesas@mailbox.org> In-Reply-To: <20260707203743.88299-1-marek.vasut+renesas@mailbox.org> References: <20260707203743.88299-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: 0e703ae12616d092e1a X-MBO-RS-META: 3bir1kfmfwuenjkeyh1wx4ii48fskhwm X-Rspamd-Queue-Id: 4gvtN663xGzKvw3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260707_133817_049468_42E96660 X-CRM114-Status: GOOD ( 15.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Renesas R-Car S4/V4H/V4M GIC600 integration has address width for AXI or APB interface configured to 32 bit, it can therefore access only the first 4 GiB of physical address space. This information comes from R-Car V4H Interface Specification sheet, there is currently no technical update number assigned to this limitation. Further input from hardware engineer indicates that this limitation also applies to R-Car S4 and V4M. Name the limitation GEN4GICITS1, and add a driver quirk to mitigate this limitation. The quirk is keyed on the combination of the GIC implementation and the platform identification in the device tree. Acked-by: Marc Zyngier Acked-by: Thomas Gleixner Co-developed-by: Yoshihiro Shimoda Signed-off-by: Yoshihiro Shimoda Signed-off-by: Marek Vasut --- NOTE: This would not be possible without prior work from Shimoda-san https://lore.kernel.org/all/20240214052050.1966439-1-yoshihiro.shimoda.uh@renesas.com/ --- Cc: "Krzysztof Wilczyński" Cc: Bjorn Helgaas Cc: Catalin Marinas Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Lorenzo Pieralisi Cc: Manivannan Sadhasivam Cc: Marc Zyngier Cc: Rob Herring Cc: Yoshihiro Shimoda Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- V2: Minimize the patch based on newly added patch in the series and only add entries into dma_32bit_impaired_platforms array. Update second paragraph of commit message slightly. V3: - Add Co-developed-by to credit Shimoda-san - Add AB from Marc V4: - Add AB from Thomas --- Documentation/arch/arm64/silicon-errata.rst | 1 + arch/arm64/Kconfig | 9 +++++++++ drivers/irqchip/irq-gic-v3-its.c | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index 014aa1c215a16..b0c68b64f5ac2 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -352,6 +352,7 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_1286807 | +----------------+-----------------+-----------------+-----------------------------+ +| Renesas | S4/V4H/V4M | N/A | RENESAS_ERRATUM_GEN4GICITS1 | +----------------+-----------------+-----------------+-----------------------------+ | Rockchip | RK3588 | #3588001 | ROCKCHIP_ERRATUM_3588001 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e136e5abdb33f..b1e0d4f1cd712 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1382,6 +1382,15 @@ config NVIDIA_CARMEL_CNP_ERRATUM If unsure, say Y. +config RENESAS_ERRATUM_GEN4GICITS1 + bool "Renesas R-Car Gen4: GIC600 can not access physical addresses above 4 GiB" + default y + help + The Renesas R-Car Gen4 S4/V4H/V4M GIC600 SoC integrations have AXI + addressing limited to the first 32-bit of physical address space. + + If unsure, say Y. + config ROCKCHIP_ERRATUM_3568002 bool "Rockchip 3568002: GIC600 can not access physical addresses higher than 4GB" default y diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index d7b46c10ef940..bf507f42ffb87 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -4889,6 +4889,11 @@ static bool __maybe_unused its_enable_quirk_hip09_162100801(void *data) } static const char * const dma_32bit_impaired_platforms[] = { +#ifdef CONFIG_RENESAS_ERRATUM_GEN4GICITS1 + "renesas,r8a779f0", + "renesas,r8a779g0", + "renesas,r8a779h0", +#endif #ifdef CONFIG_ROCKCHIP_ERRATUM_3568002 "rockchip,rk3566", "rockchip,rk3568", -- 2.53.0